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@@ -64,6 +64,27 @@
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interrupt-parent = <&gic>;
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};
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+ scu: scu@48240000 {
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+ compatible = "arm,cortex-a9-scu";
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+ reg = <0x48240000 0x100>;
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+ };
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+
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+ global_timer: timer@48240200 {
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+ compatible = "arm,cortex-a9-global-timer";
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+ reg = <0x48240200 0x100>;
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+ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-parent = <&gic>;
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+ clocks = <&dpll_mpu_m2_ck>;
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+ };
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+
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+ local_timer: timer@48240600 {
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+ compatible = "arm,cortex-a9-twd-timer";
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+ reg = <0x48240600 0x100>;
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+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
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+ interrupt-parent = <&gic>;
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+ clocks = <&dpll_mpu_m2_ck>;
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+ };
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+
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l2-cache-controller@48242000 {
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compatible = "arm,pl310-cache";
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reg = <0x48242000 0x1000>;
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