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@@ -264,25 +264,10 @@ void icssg_class_disable(struct regmap *miig_rt, int slice)
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regmap_write(miig_rt, offset, data);
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regmap_write(miig_rt, offset, data);
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}
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}
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- /* FT1 uses 6 bytes of DA address */
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- offset = offs[slice].ft1_start_len;
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- regmap_write(miig_rt, offset, FT1_LEN(6));
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-
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- /* FT1 type EQ */
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+ /* FT1 Disabled */
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for (n = 0; n < ICSSG_NUM_FT1_SLOTS; n++)
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for (n = 0; n < ICSSG_NUM_FT1_SLOTS; n++)
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- rx_class_ft1_cfg_set_type(miig_rt, slice, n, FT1_CFG_TYPE_EQ);
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-
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- /* FT1[0] DA compare address 00-00-00-00-00-00 */
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- offset = FT1_N_REG(slice, 0, FT1_DA0);
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- regmap_write(miig_rt, offset, 0);
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- offset = FT1_N_REG(slice, 0, FT1_DA1);
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- regmap_write(miig_rt, offset, 0);
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-
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- /* FT1[0] mask FE-FF-FF-FF-FF-FF */
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- offset = FT1_N_REG(slice, 0, FT1_DA0_MASK);
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- regmap_write(miig_rt, offset, 0);
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- offset = FT1_N_REG(slice, 0, FT1_DA1_MASK);
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- regmap_write(miig_rt, offset, 0);
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+ rx_class_ft1_cfg_set_type(miig_rt, slice, n,
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+ FT1_CFG_TYPE_DISABLED);
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/* clear CFG2 */
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/* clear CFG2 */
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regmap_write(miig_rt, offs[slice].rx_class_cfg2, 0);
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regmap_write(miig_rt, offs[slice].rx_class_cfg2, 0);
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@@ -296,28 +281,12 @@ void icssg_class_default(struct regmap *miig_rt, int slice)
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/* defaults */
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/* defaults */
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icssg_class_disable(miig_rt, slice);
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icssg_class_disable(miig_rt, slice);
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- /* FT1 uses 6 bytes of DA address */
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- offset = offs[slice].ft1_start_len;
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- regmap_write(miig_rt, offset, FT1_LEN(6));
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-
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- /* FT1 slots type to EQ */
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+ /* FT1 Disabled */
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for (n = 0; n < ICSSG_NUM_FT1_SLOTS; n++) {
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for (n = 0; n < ICSSG_NUM_FT1_SLOTS; n++) {
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rx_class_ft1_cfg_set_type(miig_rt, slice, n,
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rx_class_ft1_cfg_set_type(miig_rt, slice, n,
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- FT1_CFG_TYPE_EQ);
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+ FT1_CFG_TYPE_DISABLED);
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}
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}
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- /* FT1[0] DA compare address 00-00-00-00-00-00 */
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- offset = FT1_N_REG(slice, 0, FT1_DA0);
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- regmap_write(miig_rt, offset, 0);
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- offset = FT1_N_REG(slice, 0, FT1_DA1);
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- regmap_write(miig_rt, offset, 0);
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-
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- /* FT1[0] mask 00-00-00-00-00-00 */
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- offset = FT1_N_REG(slice, 0, FT1_DA0_MASK);
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- regmap_write(miig_rt, offset, 0);
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- offset = FT1_N_REG(slice, 0, FT1_DA1_MASK);
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- regmap_write(miig_rt, offset, 0);
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-
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/* Setup Classifier */
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/* Setup Classifier */
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for (n = 0; n < 5; n++) {
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for (n = 0; n < 5; n++) {
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/* match on Broadcast or MAC_PRU address */
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/* match on Broadcast or MAC_PRU address */
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