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@@ -5451,28 +5451,6 @@ void cik_pcie_gart_tlb_flush(struct radeon_device *rdev)
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WREG32(VM_INVALIDATE_REQUEST, 0x1);
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WREG32(VM_INVALIDATE_REQUEST, 0x1);
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}
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}
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-static void cik_pcie_init_compute_vmid(struct radeon_device *rdev)
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-{
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- int i;
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- uint32_t sh_mem_bases, sh_mem_config;
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-
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- sh_mem_bases = 0x6000 | 0x6000 << 16;
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- sh_mem_config = ALIGNMENT_MODE(SH_MEM_ALIGNMENT_MODE_UNALIGNED);
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- sh_mem_config |= DEFAULT_MTYPE(MTYPE_NONCACHED);
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-
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- mutex_lock(&rdev->srbm_mutex);
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- for (i = 8; i < 16; i++) {
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- cik_srbm_select(rdev, 0, 0, 0, i);
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- /* CP and shaders */
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- WREG32(SH_MEM_CONFIG, sh_mem_config);
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- WREG32(SH_MEM_APE1_BASE, 1);
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- WREG32(SH_MEM_APE1_LIMIT, 0);
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- WREG32(SH_MEM_BASES, sh_mem_bases);
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- }
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- cik_srbm_select(rdev, 0, 0, 0, 0);
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- mutex_unlock(&rdev->srbm_mutex);
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-}
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-
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/**
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/**
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* cik_pcie_gart_enable - gart enable
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* cik_pcie_gart_enable - gart enable
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*
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*
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@@ -5586,8 +5564,6 @@ static int cik_pcie_gart_enable(struct radeon_device *rdev)
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cik_srbm_select(rdev, 0, 0, 0, 0);
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cik_srbm_select(rdev, 0, 0, 0, 0);
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mutex_unlock(&rdev->srbm_mutex);
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mutex_unlock(&rdev->srbm_mutex);
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- cik_pcie_init_compute_vmid(rdev);
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-
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cik_pcie_gart_tlb_flush(rdev);
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cik_pcie_gart_tlb_flush(rdev);
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",
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(unsigned)(rdev->mc.gtt_size >> 20),
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(unsigned)(rdev->mc.gtt_size >> 20),
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