arm64: dts: ti: k3-am654: Update the power domain cells

Update the power-domain cells to 2 and mark all devices as
exclusive for now.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>

arch/arm64/boot/dts/ti/k3-am65-main.dtsi

@@ -106,7 +106,7 @@
 		reg = <0x0 0x900000 0x0 0x2000>;
 		reg-names = "serdes";
 		#phy-cells = <2>;
-		power-domains = <&k3_pds 153>;
+		power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 153 4>, <&k3_clks 153 1>, <&serdes1 AM654_SERDES_LO_REFCLK>;
 		clock-output-names = "serdes0_cmu_refclk", "serdes0_lo_refclk", "serdes0_ro_refclk";
 		assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
@@ -122,7 +122,7 @@
 		reg = <0x0 0x910000 0x0 0x2000>;
 		reg-names = "serdes";
 		#phy-cells = <2>;
-		power-domains = <&k3_pds 154>;
+		power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&serdes0 AM654_SERDES_RO_REFCLK>, <&k3_clks 154 1>, <&k3_clks 154 5>;
 		clock-output-names = "serdes1_cmu_refclk", "serdes1_lo_refclk", "serdes1_ro_refclk";
 		assigned-clocks = <&k3_clks 154 5>, <&serdes1 AM654_SERDES_CMU_REFCLK>;
@@ -141,7 +141,7 @@
 		interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
 		clock-frequency = <48000000>;
 		current-speed = <115200>;
-		power-domains = <&k3_pds 146>;
+		power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
 		dmas = <&main_udmap &pdma1 20 UDMA_DIR_TX>,
 		       <&main_udmap &pdma1 20 UDMA_DIR_RX>;
 		dma-names = "tx", "rx";
@@ -154,7 +154,7 @@
 		reg-io-width = <4>;
 		interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>;
 		clock-frequency = <48000000>;
-		power-domains = <&k3_pds 147>;
+		power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
 		dmas = <&main_udmap &pdma1 21 UDMA_DIR_TX>,
 		       <&main_udmap &pdma1 21 UDMA_DIR_RX>;
 		dma-names = "tx", "rx";
@@ -167,7 +167,7 @@
 		reg-io-width = <4>;
 		interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>;
 		clock-frequency = <48000000>;
-		power-domains = <&k3_pds 148>;
+		power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
 		dmas = <&main_udmap &pdma1 22 UDMA_DIR_TX>,
 		       <&main_udmap &pdma1 22 UDMA_DIR_RX>;
 		dma-names = "tx", "rx";
@@ -388,7 +388,7 @@
 		#size-cells = <0>;
 		clock-names = "fck";
 		clocks = <&k3_clks 110 1>;
-		power-domains = <&k3_pds 110>;
+		power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>;
 	};
 
 	main_i2c1: i2c@2010000 {
@@ -399,7 +399,7 @@
 		#size-cells = <0>;
 		clock-names = "fck";
 		clocks = <&k3_clks 111 1>;
-		power-domains = <&k3_pds 111>;
+		power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
 	};
 
 	main_i2c2: i2c@2020000 {
@@ -410,7 +410,7 @@
 		#size-cells = <0>;
 		clock-names = "fck";
 		clocks = <&k3_clks 112 1>;
-		power-domains = <&k3_pds 112>;
+		power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
 	};
 
 	main_i2c3: i2c@2030000 {
@@ -421,7 +421,7 @@
 		#size-cells = <0>;
 		clock-names = "fck";
 		clocks = <&k3_clks 113 1>;
-		power-domains = <&k3_pds 113>;
+		power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
 	};
 
 	main_gpio0:  main_gpio0@600000 {
@@ -480,7 +480,7 @@
 
 		clocks = <&k3_clks 104 0>;
 		clock-names = "fck";
-		power-domains = <&k3_pds 104>;
+		power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
 
 		status = "disabled";
 	};
@@ -501,7 +501,7 @@
 
 		clocks = <&k3_clks 105 0>;
 		clock-names = "fck";
-		power-domains = <&k3_pds 105>;
+		power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
 
 		status = "disabled";
 	};
@@ -522,7 +522,7 @@
 
 		clocks = <&k3_clks 106 0>;
 		clock-names = "fck";
-		power-domains = <&k3_pds 106>;
+		power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
 
 		status = "disabled";
 	};
@@ -531,7 +531,7 @@
 		compatible = "ti,am654-sgx544", "img,sgx544";
 		reg = <0x0 0x7000000 0x0 0x10000>;
 		interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
-		power-domains = <&k3_pds 65>;
+		power-domains = <&k3_pds 65 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 65 0>, <&k3_clks 65 1>, <&k3_clks 65 2>, <&k3_clks 65 3>;
 		clock-names = "mem_clk", "hyd_clk", "sgx_clk", "sys_clk";
 		status = "disabled";
@@ -666,7 +666,7 @@
 	icssg_soc_bus0: pruss-soc-bus@b026004 {
 		compatible = "ti,am654-icssg-soc-bus";
 		reg = <0x00 0x0b026004 0x00 0x4>;
-		power-domains = <&k3_pds 62>;
+		power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x0b000000 0x00 0x0b000000 0x100000>;
@@ -852,7 +852,7 @@
 	icssg_soc_bus1: pruss-soc-bus@b126004 {
 		compatible = "ti,am654-icssg-soc-bus";
 		reg = <0x00 0x0b126004 0x00 0x4>;
-		power-domains = <&k3_pds 63>;
+		power-domains = <&k3_pds 63 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x0b100000 0x00 0x0b100000 0x100000>;
@@ -1038,7 +1038,7 @@
 	icssg_soc_bus2: pruss-soc-bus@b226004 {
 		compatible = "ti,am654-icssg-soc-bus";
 		reg = <0x00 0x0b226004 0x00 0x4>;
-		power-domains = <&k3_pds 64>;
+		power-domains = <&k3_pds 64 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		ranges = <0x0b200000 0x00 0x0b200000 0x100000>;
@@ -1225,7 +1225,7 @@
 		compatible = "ti,am654-ecap", "ti,am3352-ecap";
 		#pwm-cells = <3>;
 		reg = <0x0 0x03100000 0x0 0x60>;
-		power-domains = <&k3_pds 39>;
+		power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 39 0>;
 		clock-names = "fck";
 	};
@@ -1252,7 +1252,7 @@
 
 		syscon = <&scm_conf>;
 
-		power-domains = <&k3_pds 67>;
+		power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
 
 		clocks =	<&k3_clks 67 1>,
 				<&k3_clks 216 1>,
@@ -1289,7 +1289,7 @@
 		#size-cells = <0>;
 		clock-names = "fck";
 		clocks = <&k3_clks 2 0>;
-		power-domains = <&k3_pds 2>;
+		power-domains = <&k3_pds 2 TI_SCI_PD_EXCLUSIVE>;
 		status = "disabled";
 
 		ports {
@@ -1305,7 +1305,7 @@
 	sdhci0: sdhci@4f80000 {
 		compatible = "ti,am654-sdhci-5.1";
 		reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>;
-		power-domains = <&k3_pds 47>;
+		power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 47 0>, <&k3_clks 47 1>;
 		clock-names = "clk_ahb", "clk_xin";
 		interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
@@ -1319,7 +1319,7 @@
 	sdhci1: sdhci@4fa0000 {
 		compatible = "ti,am654-sdhci-5.1";
 		reg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>;
-		power-domains = <&k3_pds 48>;
+		power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 48 0>, <&k3_clks 48 1>;
 		clock-names = "clk_ahb", "clk_xin";
 		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
@@ -1337,7 +1337,7 @@
 		ranges = <0x0 0x0 0x4000000 0x20000>;
 		interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
 		dma-coherent;
-		power-domains = <&k3_pds 151>;
+		power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
 		assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
 		assigned-clock-parents = <&k3_clks 151 4>,	/* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
 					 <&k3_clks 151 9>;	/* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
@@ -1376,7 +1376,7 @@
 		ranges = <0x0 0x0 0x4020000 0x20000>;
 		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
 		dma-coherent;
-		power-domains = <&k3_pds 152>;
+		power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
 		assigned-clocks = <&k3_clks 152 2>;
 		assigned-clock-parents = <&k3_clks 152 4>;	/* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
 
@@ -1410,7 +1410,7 @@
 		reg = <0x0 0x2100000 0x0 0x400>;
 		interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 137 1>;
-		power-domains = <&k3_pds 137>;
+		power-domains = <&k3_pds 137 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		dmas = <&main_udmap &pdma1 0 UDMA_DIR_TX>,
@@ -1423,7 +1423,7 @@
 		reg = <0x0 0x2110000 0x0 0x400>;
 		interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 138 1>;
-		power-domains = <&k3_pds 138>;
+		power-domains = <&k3_pds 138 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 		assigned-clocks = <&k3_clks 137 1>;
@@ -1435,7 +1435,7 @@
 		reg = <0x0 0x2120000 0x0 0x400>;
 		interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 139 1>;
-		power-domains = <&k3_pds 139>;
+		power-domains = <&k3_pds 139 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
@@ -1445,7 +1445,7 @@
 		reg = <0x0 0x2130000 0x0 0x400>;
 		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 140 1>;
-		power-domains = <&k3_pds 140>;
+		power-domains = <&k3_pds 140 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
@@ -1455,7 +1455,7 @@
 		reg = <0x0 0x2140000 0x0 0x400>;
 		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 141 1>;
-		power-domains = <&k3_pds 141>;
+		power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
@@ -1464,7 +1464,7 @@
 		compatible = "ti,am654-pcie-rc";
 		reg =  <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x2000>, <0x0 0x5506000 0x0 0x1000>;
 		reg-names = "app", "dbics", "config", "atu";
-		power-domains = <&k3_pds 120>;
+		power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <3>;
 		#size-cells = <2>;
 		ranges = <0x81000000 0 0          0x0 0x10020000 0 0x00010000
@@ -1500,7 +1500,7 @@
 		compatible = "ti,am654-pcie-ep";
 		reg =  <0x0 0x5500000 0x0 0x1000>, <0x0 0x5501000 0x0 0x1000>, <0x0 0x10000000 0x0 0x8000000>, <0x0 0x5506000 0x0 0x1000>;
 		reg-names = "app", "dbics", "addr_space", "atu";
-		power-domains = <&k3_pds 120>;
+		power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
 		ti,syscon-pcie-mode = <&pcie0_mode>;
 		num-lanes = <1>;
 		num-ib-windows = <16>;
@@ -1515,7 +1515,7 @@
 		compatible = "ti,am654-pcie-rc";
 		reg =  <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x2000>, <0x0 0x5606000 0x0 0x1000>;
 		reg-names = "app", "dbics", "config", "atu";
-		power-domains = <&k3_pds 121>;
+		power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <3>;
 		#size-cells = <2>;
 		ranges = <0x81000000 0 0          0x0   0x18020000 0 0x00010000
@@ -1551,7 +1551,7 @@
 		compatible = "ti,am654-pcie-ep";
 		reg =  <0x0 0x5600000 0x0 0x1000>, <0x0 0x5601000 0x0 0x1000>, <0x0 0x18000000 0x0 0x4000000>, <0x0 0x5606000 0x0 0x1000>;
 		reg-names = "app", "dbics", "addr_space", "atu";
-		power-domains = <&k3_pds 121>;
+		power-domains = <&k3_pds 121 TI_SCI_PD_EXCLUSIVE>;
 		ti,syscon-pcie-mode = <&pcie1_mode>;
 		num-lanes = <1>;
 		num-ib-windows = <16>;
@@ -1590,7 +1590,7 @@
 		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
 		#pwm-cells = <3>;
 		reg = <0x0 0x3000000 0x0 0x100>;
-		power-domains = <&k3_pds 40>;
+		power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&ehrpwm_tbclk 0>, <&k3_clks 40 0>;
 		clock-names = "tbclk", "fck";
 	};
@@ -1599,7 +1599,7 @@
 		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
 		#pwm-cells = <3>;
 		reg = <0x0 0x3010000 0x0 0x100>;
-		power-domains = <&k3_pds 41>;
+		power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&ehrpwm_tbclk 1>, <&k3_clks 41 0>;
 		clock-names = "tbclk", "fck";
 	};
@@ -1608,7 +1608,7 @@
 		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
 		#pwm-cells = <3>;
 		reg = <0x0 0x3020000 0x0 0x100>;
-		power-domains = <&k3_pds 42>;
+		power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&ehrpwm_tbclk 2>, <&k3_clks 42 0>;
 		clock-names = "tbclk", "fck";
 	};
@@ -1617,7 +1617,7 @@
 		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
 		#pwm-cells = <3>;
 		reg = <0x0 0x3030000 0x0 0x100>;
-		power-domains = <&k3_pds 43>;
+		power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&ehrpwm_tbclk 3>, <&k3_clks 43 0>;
 		clock-names = "tbclk", "fck";
 	};
@@ -1626,7 +1626,7 @@
 		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
 		#pwm-cells = <3>;
 		reg = <0x0 0x3040000 0x0 0x100>;
-		power-domains = <&k3_pds 44>;
+		power-domains = <&k3_pds 44 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&ehrpwm_tbclk 4>, <&k3_clks 44 0>;
 		clock-names = "tbclk", "fck";
 	};
@@ -1635,7 +1635,7 @@
 		compatible = "ti,am654-ehrpwm", "ti,am3352-ehrpwm";
 		#pwm-cells = <3>;
 		reg = <0x0 0x3050000 0x0 0x100>;
-		power-domains = <&k3_pds 45>;
+		power-domains = <&k3_pds 45 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&ehrpwm_tbclk 5>, <&k3_clks 45 0>;
 		clock-names = "tbclk", "fck";
 	};

arch/arm64/boot/dts/ti/k3-am65-mcu.dtsi

@@ -28,7 +28,7 @@
 			interrupts = <GIC_SPI 565 IRQ_TYPE_LEVEL_HIGH>;
 			clock-frequency = <96000000>;
 			current-speed = <115200>;
-			power-domains = <&k3_pds 149>;
+			power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
 			dmas = <&mcu_udmap &mcu_pdma1 18 UDMA_DIR_TX>,
 			       <&mcu_udmap &mcu_pdma1 18 UDMA_DIR_RX>;
 			dma-names = "tx", "rx";
@@ -54,7 +54,7 @@
 		#size-cells = <0>;
 		clock-names = "fck";
 		clocks = <&k3_clks 114 1>;
-		power-domains = <&k3_pds 114>;
+		power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
 	};
 
 	mcu_navss: mcu_navss {
@@ -141,7 +141,7 @@
 		dma-coherent;
 		clocks = <&k3_clks 5 10>;
 		clock-names = "fck";
-		power-domains = <&k3_pds 5>;
+		power-domains = <&k3_pds 5 TI_SCI_PD_EXCLUSIVE>;
 		ti,psil-base = <0x7000>;
 		cpsw-phy-sel = <&phy_sel>;
 
@@ -264,7 +264,7 @@
 		reg = <0x0 0x40300000 0x0 0x400>;
 		interrupts = <GIC_SPI 560 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 142 1>;
-		power-domains = <&k3_pds 142>;
+		power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
@@ -274,7 +274,7 @@
 		reg = <0x0 0x40310000 0x0 0x400>;
 		interrupts = <GIC_SPI 561 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 143 1>;
-		power-domains = <&k3_pds 143>;
+		power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
@@ -284,7 +284,7 @@
 		reg = <0x0 0x40320000 0x0 0x400>;
 		interrupts = <GIC_SPI 562 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&k3_clks 144 1>;
-		power-domains = <&k3_pds 144>;
+		power-domains = <&k3_pds 144 TI_SCI_PD_EXCLUSIVE>;
 		#address-cells = <1>;
 		#size-cells = <0>;
 	};
@@ -326,7 +326,7 @@
 		#size-cells = <1>;
 		ranges = <0x41000000 0x00 0x41000000 0x20000>,
 			 <0x41400000 0x00 0x41400000 0x20000>;
-		power-domains = <&k3_pds 129>;
+		power-domains = <&k3_pds 129 TI_SCI_PD_EXCLUSIVE>;
 
 		mcu_r5fss0_core0: r5f@41000000 {
 			compatible = "ti,am654-r5f";
@@ -379,7 +379,7 @@
 			assigned-clocks = <&k3_clks 55 5>;
 			assigned-clock-parents = <&k3_clks 55 7>;
 			assigned-clock-rates = <166666666>;
-			power-domains = <&k3_pds 55>;
+			power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			dma-coherent;
@@ -394,7 +394,7 @@
 			cdns,fifo-width = <4>;
 			cdns,trigger-address = <0x58000000>;
 			clocks = <&k3_clks 55 16>;
-			power-domains = <&k3_pds 55>;
+			power-domains = <&k3_pds 55 TI_SCI_PD_EXCLUSIVE>;
 			#address-cells = <1>;
 			#size-cells = <0>;
 			dma-coherent;
@@ -406,7 +406,7 @@
 		reg = <0x0 0x40528000 0x0 0x400>,
 		      <0x0 0x40500000 0x0 0x4400>;
 		reg-names = "m_can", "message_ram";
-		power-domains = <&k3_pds 102>;
+		power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 102 0>, <&k3_clks 102 5>;
 		clock-names = "cclk", "hclk";
 		interrupt-parent = <&gic500>;
@@ -422,7 +422,7 @@
 		reg = <0x0 0x40568000 0x0 0x400>,
 		      <0x0 0x40540000 0x0 0x4400>;
 		reg-names = "m_can", "message_ram";
-		power-domains = <&k3_pds 103>;
+		power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
 		clocks = <&k3_clks 103 0>, <&k3_clks 103 5>;
 		clock-names = "cclk", "hclk";
 		interrupt-parent = <&gic500>;

arch/arm64/boot/dts/ti/k3-am65-wakeup.dtsi

@@ -20,7 +20,7 @@
 
 		k3_pds: power-controller {
 			compatible = "ti,sci-pm-domain";
-			#power-domain-cells = <1>;
+			#power-domain-cells = <2>;
 		};
 
 		k3_clks: clocks {
@@ -50,7 +50,7 @@
 		interrupts = <GIC_SPI 697 IRQ_TYPE_LEVEL_HIGH>;
 		clock-frequency = <48000000>;
 		current-speed = <115200>;
-		power-domains = <&k3_pds 150>;
+		power-domains = <&k3_pds 150 TI_SCI_PD_EXCLUSIVE>;
 	};
 
 	wkup_intr: interrupt-controller2 {
@@ -71,7 +71,7 @@
 		#size-cells = <0>;
 		clock-names = "fck";
 		clocks = <&k3_clks 115 1>;
-		power-domains = <&k3_pds 115>;
+		power-domains = <&k3_pds 115 TI_SCI_PD_EXCLUSIVE>;
 	};
 
 	wkup_gpio0: wkup_gpio0@42110000 {
@@ -95,7 +95,7 @@
 	wkup_vtm0: wkup_vtm0@42050000 {
 		compatible = "ti,am654-vtm";
 		reg = <0x42050000 0x25c>;
-		power-domains = <&k3_pds 80>;
+		power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
 		#thermal-sensor-cells = <1>;
 	};
 

arch/arm64/boot/dts/ti/k3-am65.dtsi

@@ -11,6 +11,7 @@
 #include <dt-bindings/pinctrl/k3.h>
 #include <dt-bindings/gpio/gpio.h>
 #include <dt-bindings/dma/k3-udma.h>
+#include <dt-bindings/soc/ti,sci_pm_domain.h>
 
 / {
 	model = "Texas Instruments K3 AM654 SoC";