Merged TI feature rpmsg into ti-linux-4.19.y

* 'rpmsg-ti-linux-4.19.y-intg' of git://git.ti.com/rpmsg/rpmsg:
  arm64: dts: ti: k3-j721e-main: Add ICSSG MDIO nodes
  arm64: dts: ti: k3-j721e-main: Add PRU system events for virtio
  arm64: dts: ti: k3-j721e-main: Add ICSSG nodes
  remoteproc/pru: Add support for various PRU cores on K3 J721E SoCs
  dt-bindings: remoteproc: pru: Update bindings for K3 J721E SoCs
  irqchip/irq-pruss-intc: Add support for ICSSG INTC on K3 J721E SoCs
  dt-bindings: irqchip: pruss-intc: Update bindings for K3 J721E SoCs
  soc: ti: pruss: Enable support for ICSSG subsystems on K3 J721E SoCs
  dt-bindings: soc: ti: pruss: Update bindings for K3 J721E SoCs

Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>

Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.txt

@@ -27,6 +27,7 @@ Required Properties:
                              "ti,am5728-pruss-intc" for AM57xx family of SoCs
                              "ti,k2g-pruss-intc" for 66AK2G family of SoCs
                              "ti,am654-icssg-intc" for K3 AM65x family of SoCs
+                             "ti,j721e-icssg-intc" for K3 J721E family of SoCs
 - reg                  : base address and size for the PRUSS INTC sub-module
 - interrupt-controller : mark this node as an interrupt controller
 - #interrupt-cells     : should be 1. Client users shall use the PRU System

Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.txt

@@ -1,16 +1,20 @@
-PRU/RTU Core on TI SoCs
-=======================
+PRU/RTU/Tx_PRU Core on TI SoCs
+==============================
 
 Each PRUSS has dual PRU cores, each represented by a PRU node. Each PRU core
 has a dedicated Instruction RAM, Control and Debug register sets, and use
-the Data RAMs present within the PRUSS for code execution. K3 SoCs have two
-additional PRU cores called RTUs with slightly different IP integration. Each
-RTU core can be used independently like a PRU, or alongside a corresponding
-PRU core to provide/implement auxiliary functionality/support.
+the Data RAMs present within the PRUSS for code execution.
 
-Each PRU or RTU core node should be defined as a child node of the corresponding
-PRUSS node. Each node can optionally be rendered inactive by using the standard
-DT string property, "status".
+The K3 SoCs containing ICSSG v1.0 (eg: AM65x) have two additional PRU cores
+called RTUs with slightly different IP integration. The K3 SoCs containing
+the revised ICSSG v1.1 (eg: J721E) have an extra two auxiliary PRU cores
+called Tx_PRUs that augment the PRUs. Each RTU or Tx_PRU core can be used
+independently like a PRU, or alongside a corresponding PRU core to
+provide/implement auxiliary functionality/support.
+
+Each PRU, RTU or Tx_PRU core node should be defined as a child node of the
+corresponding PRUSS node. Each node can optionally be rendered inactive by
+using the standard DT string property, "status".
 
 Please see the overall PRUSS bindings document for additional details
 including a complete example,
@@ -25,6 +29,9 @@ Required Properties:
                        "ti,k2g-pru" for 66AK2G family of SoCs
                        "ti,am654-pru" for PRUs in K3 AM65x family of SoCs
                        "ti,am654-rtu" for RTUs in K3 AM65x family of SoCs
+                       "ti,j721e-pru" for PRUs in K3 J721E family of SoCs
+                       "ti,j721e-rtu" for RTUs in K3 J721E family of SoCs
+                       "ti,j721e-tx-pru" for Tx_PRUs in K3 J721E family of SoCs
 - reg            : base address and size for each of the 3 sub-module address
                    spaces as mentioned in reg-names, and in the same order as
                    the reg-names

Documentation/devicetree/bindings/soc/ti/ti,pruss.txt

@@ -50,6 +50,7 @@ Required Properties:
                        "ti,am5728-pruss-soc-bus" for AM57xx family of SoCs
                        "ti,k2g-pruss-soc-bus" for 66AK2G family of SoCs
                        "ti,am654-icssg-soc-bus" for K3 AM65x family of SoCs
+                       "ti,j721e-icssg-soc-bus" for K3 J721E family of SoCs
 - reg            : address and size of the PRUSS CFG sub-module register
                    dictating the interconnect configuration
 - #address-cells : should be 1
@@ -62,8 +63,8 @@ SoC-specific Required properties:
 The following are mandatory properties for all OMAP-architecture based SoCs:
 - ti,hwmods      : name of the hwmod associated with the PRUSS instance
 
-The following properties are _required_ only for Keystone 2 66AK2G SoCs and
-K3 AM65x SoCs only:
+The following properties are _required_ only for Keystone 2 66AK2G SoCs,
+K3 AM65x SoCs and K3 J721E SoCs only:
 - power-domains  : Should contain a phandle to a PM domain provider node and an
                    args specifier containing the PRUSS SCI device id value. This
                    property is as per the binding,
@@ -85,6 +86,7 @@ Required Properties:
                        "ti,am5728-pruss" for AM57xx family of SoCs
                        "ti,k2g-pruss" for 66AK2G family of SoCs
                        "ti,am654-icssg" for K3 AM65x family of SoCs
+                       "ti,j721e-icssg" for K3 J721E family of SoCs
 - reg            : base address and size of the entire PRU-ICSS space
 - interrupts     : all the interrupts generated towards the main host
                    processor in the SoC. The format depends on the
@@ -103,7 +105,7 @@ Required Properties:
                    same address view as the parent, so should be mentioned without
                    any value for the property
 
-Optional Properties: (Applies only to "ti,am654-icssg")
+Optional Properties: (Applies only to "ti,am654-icssg" and "ti,j721e-icssg")
 --------------------
 - ti,psil-base	    : PSIL thread start number
 - ti,psil-config<n> :   PSIL configuration for each thread number
@@ -174,7 +176,7 @@ Required Properties:
 
 PRUSS INTC Node
 ================
-Each PRUSS has a single interrupt controller instance that is common to both
+Each PRUSS has a single interrupt controller instance that is common to all
 the PRU cores. This should be represented as an interrupt-controller node. The
 bindings for this shall be defined in the file,
     Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.txt
@@ -184,8 +186,9 @@ PRU Node
 =========
 Each PRUSS has dual PRU cores, each represented as a remoteproc device through
 a PRU child node each. Each node can optionally be rendered inactive by using
-the standard DT string property, "status". The bindings for this shall be
-defined in the file,
+the standard DT string property, "status". The ICSSG IP present on K3 SoCs have
+additional auxiliary PRU cores with slightly different IP integration. The
+bindings for this shall be defined in the file,
     Documentation/devicetree/bindings/remoteproc/ti,pru-rproc.txt
 
 

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

@@ -2169,4 +2169,334 @@
 			dma-coherent;
 		};
 	};
+
+	icssg_soc_bus0: pruss-soc-bus@b026004 {
+		compatible = "ti,j721e-icssg-soc-bus";
+		reg = <0x00 0x0b026004 0x00 0x4>;
+		power-domains = <&k3_pds 119 TI_SCI_PD_EXCLUSIVE>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0b000000 0x00 0x0b000000 0x100000>;
+		dma-ranges;
+
+		icssg0: icssg@b000000 {
+			compatible = "ti,j721e-icssg";
+			reg = <0xb000000 0x80000>;
+			interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 259 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 260 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "host2", "host3", "host4",
+					  "host5", "host6", "host7",
+					  "host8", "host9";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			dma-ranges;
+
+			icssg0_mem: memories@b000000 {
+				reg = <0xb000000 0x2000>,
+				      <0xb002000 0x2000>,
+				      <0xb010000 0x10000>;
+				reg-names = "dram0", "dram1",
+					    "shrdram2";
+			};
+
+			icssg0_cfg: cfg@b026000 {
+				compatible = "syscon";
+				reg = <0xb026000 0x200>;
+			};
+
+			icssg0_coreclk_mux: coreclk_mux {
+				#clock-cells = <0>;
+				clocks = <&k3_clks 119 24>, /* icssg0_core_clk */
+					 <&k3_clks 119 1>;  /* icssg0_iclk */
+				assigned-clocks = <&icssg0_coreclk_mux>;
+				assigned-clock-parents = <&k3_clks 119 1>;
+			};
+
+			icssg0_iepclk_mux: iepclk_mux {
+				#clock-cells = <0>;
+				clocks = <&k3_clks 119 3>,	/* icssg0_iep_clk */
+					 <&icssg0_coreclk_mux>;	/* core_clk */
+				assigned-clocks = <&icssg0_iepclk_mux>;
+				assigned-clock-parents = <&icssg0_coreclk_mux>;
+			};
+
+			icssg0_iep0: iep@b02e000 {
+				compatible = "syscon";
+				reg = <0xb02e000 0x1000>;
+				clocks = <&icssg0_iepclk_mux>;
+			};
+
+			icssg0_iep1: iep@b02f000 {
+				compatible = "syscon";
+				reg = <0xb02f000 0x1000>;
+				clocks = <&icssg0_iepclk_mux>;
+			};
+
+			icssg0_mii_rt: mii-rt@b032000 {
+				compatible = "syscon";
+				reg = <0xb032000 0x100>;
+			};
+
+			icssg0_mii_g_rt: mii-g-rt@b033000 {
+				compatible = "syscon";
+				reg = <0xb033000 0x1000>;
+			};
+
+			icssg0_intc: interrupt-controller@b020000 {
+				compatible = "ti,j721e-icssg-intc";
+				reg = <0xb020000 0x2000>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+			};
+
+			pru0_0: pru@b034000 {
+				compatible = "ti,j721e-pru";
+				reg = <0xb034000 0x3000>,
+				      <0xb022000 0x100>,
+				      <0xb022400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-pru0_0-fw";
+				interrupt-parent = <&icssg0_intc>;
+				interrupts = <16>, <17>;
+				interrupt-names = "vring", "kick";
+			};
+
+			rtu0_0: rtu@b004000 {
+				compatible = "ti,j721e-rtu";
+				reg = <0xb004000 0x2000>,
+				      <0xb023000 0x100>,
+				      <0xb023400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-rtu0_0-fw";
+				interrupt-parent = <&icssg0_intc>;
+				interrupts = <20>, <21>;
+				interrupt-names = "vring", "kick";
+			};
+
+			tx_pru0_0: txpru@b00a000 {
+				compatible = "ti,j721e-tx-pru";
+				reg = <0xb00a000 0x1800>,
+				      <0xb025000 0x100>,
+				      <0xb025400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-txpru0_0-fw";
+			};
+
+			pru0_1: pru@b038000 {
+				compatible = "ti,j721e-pru";
+				reg = <0xb038000 0x3000>,
+				      <0xb024000 0x100>,
+				      <0xb024400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-pru0_1-fw";
+				interrupt-parent = <&icssg0_intc>;
+				interrupts = <18>, <19>;
+				interrupt-names = "vring", "kick";
+			};
+
+			rtu0_1: rtu@b006000 {
+				compatible = "ti,j721e-rtu";
+				reg = <0xb006000 0x2000>,
+				      <0xb023800 0x100>,
+				      <0xb023c00 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-rtu0_1-fw";
+				interrupt-parent = <&icssg0_intc>;
+				interrupts = <22>, <23>;
+				interrupt-names = "vring", "kick";
+			};
+
+			tx_pru0_1: txpru@b00c000 {
+				compatible = "ti,j721e-tx-pru";
+				reg = <0xb00c000 0x1800>,
+				      <0xb025800 0x100>,
+				      <0xb025c00 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-txpru0_1-fw";
+			};
+
+			icssg0_mdio: mdio@b032400 {
+				compatible = "ti,davinci_mdio";
+				reg = <0xb032400 0x100>;
+				clocks = <&k3_clks 119 1>;
+				clock-names = "fck";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus_freq = <1000000>;
+				status = "disabled";
+			};
+		};
+	};
+
+	icssg_soc_bus1: pruss-soc-bus@b126004 {
+		compatible = "ti,j721e-icssg-soc-bus";
+		reg = <0x00 0x0b126004 0x00 0x4>;
+		power-domains = <&k3_pds 120 TI_SCI_PD_EXCLUSIVE>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges = <0x0b100000 0x00 0x0b100000 0x100000>;
+		dma-ranges;
+
+		icssg1: icssg@b100000 {
+			compatible = "ti,j721e-icssg";
+			reg = <0xb100000 0x80000>;
+			interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 264 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "host2", "host3", "host4",
+					  "host5", "host6", "host7",
+					  "host8", "host9";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+			dma-ranges;
+
+			icssg1_mem: memories@b100000 {
+				reg = <0xb100000 0x2000>,
+				      <0xb102000 0x2000>,
+				      <0xb110000 0x10000>;
+				reg-names = "dram0", "dram1",
+					    "shrdram2";
+			};
+
+			icssg1_cfg: cfg@b126000 {
+				compatible = "syscon";
+				reg = <0xb126000 0x200>;
+			};
+
+			icssg1_coreclk_mux: coreclk_mux {
+				#clock-cells = <0>;
+				clocks = <&k3_clks 120 54>, /* icssg1_core_clk */
+					 <&k3_clks 120 4>;  /* icssg1_iclk */
+				assigned-clocks = <&icssg1_coreclk_mux>;
+				assigned-clock-parents = <&k3_clks 120 4>;
+			};
+
+			icssg1_iepclk_mux: iepclk_mux {
+				#clock-cells = <0>;
+				clocks = <&k3_clks 120 9>,	/* icssg1_iep_clk */
+					 <&icssg1_coreclk_mux>;	/* core_clk */
+				assigned-clocks = <&icssg1_iepclk_mux>;
+				assigned-clock-parents = <&icssg1_coreclk_mux>;
+			};
+
+			icssg1_iep0: iep@b12e000 {
+				compatible = "syscon";
+				reg = <0xb12e000 0x1000>;
+				clocks = <&icssg1_iepclk_mux>;
+			};
+
+			icssg1_iep1: iep@b12f000 {
+				compatible = "syscon";
+				reg = <0xb12f000 0x1000>;
+				clocks = <&icssg1_iepclk_mux>;
+			};
+
+			icssg1_mii_rt: mii-rt@b132000 {
+				compatible = "syscon";
+				reg = <0xb132000 0x100>;
+			};
+
+			icssg1_mii_g_rt: mii-g-rt@b133000 {
+				compatible = "syscon";
+				reg = <0xb133000 0x1000>;
+			};
+
+			icssg1_intc: interrupt-controller@b120000 {
+				compatible = "ti,j721e-icssg-intc";
+				reg = <0xb120000 0x2000>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+			};
+
+			pru1_0: pru@b134000 {
+				compatible = "ti,j721e-pru";
+				reg = <0xb134000 0x4000>,
+				      <0xb122000 0x100>,
+				      <0xb122400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-pru1_0-fw";
+				interrupt-parent = <&icssg1_intc>;
+				interrupts = <16>, <17>;
+				interrupt-names = "vring", "kick";
+			};
+
+			rtu1_0: rtu@b104000 {
+				compatible = "ti,j721e-rtu";
+				reg = <0xb104000 0x2000>,
+				      <0xb123000 0x100>,
+				      <0xb123400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-rtu1_0-fw";
+				interrupt-parent = <&icssg1_intc>;
+				interrupts = <20>, <21>;
+				interrupt-names = "vring", "kick";
+			};
+
+			tx_pru1_0: txpru@b10a000 {
+				compatible = "ti,j721e-tx-pru";
+				reg = <0xb10a000 0x1800>,
+				      <0xb125000 0x100>,
+				      <0xb125400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-txpru1_0-fw";
+			};
+
+			pru1_1: pru@b138000 {
+				compatible = "ti,j721e-pru";
+				reg = <0xb138000 0x4000>,
+				      <0xb124000 0x100>,
+				      <0xb124400 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-pru1_1-fw";
+				interrupt-parent = <&icssg1_intc>;
+				interrupts = <18>, <19>;
+				interrupt-names = "vring", "kick";
+			};
+
+			rtu1_1: rtu@b106000 {
+				compatible = "ti,j721e-rtu";
+				reg = <0xb106000 0x2000>,
+				      <0xb123800 0x100>,
+				      <0xb123c00 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-rtu1_1-fw";
+				interrupt-parent = <&icssg1_intc>;
+				interrupts = <22>, <23>;
+				interrupt-names = "vring", "kick";
+			};
+
+			tx_pru1_1: txpru@b10c000 {
+				compatible = "ti,j721e-tx-pru";
+				reg = <0xb10c000 0x1800>,
+				      <0xb125800 0x100>,
+				      <0xb125c00 0x100>;
+				reg-names = "iram", "control", "debug";
+				firmware-name = "j7-txpru1_1-fw";
+			};
+
+			icssg1_mdio: mdio@b132400 {
+				compatible = "ti,davinci_mdio";
+				reg = <0xb132400 0x100>;
+				clocks = <&k3_clks 120 4>;
+				clock-names = "fck";
+				#address-cells = <1>;
+				#size-cells = <0>;
+				bus_freq = <1000000>;
+				status = "disabled";
+			};
+		};
+	};
 };

drivers/irqchip/irq-pruss-intc.c

@@ -746,7 +746,7 @@ static const struct pruss_intc_match_data am437x_k2g_pruss_intc_data = {
 	.no_host7_intr = true,
 };
 
-static const struct pruss_intc_match_data am65x_icssg_intc_data = {
+static const struct pruss_intc_match_data am65x_j721e_icssg_intc_data = {
 	.num_system_events = 160,
 	.num_host_intrs = 20,
 	.no_host7_intr = false,
@@ -771,7 +771,11 @@ static const struct of_device_id pruss_intc_of_match[] = {
 	},
 	{
 		.compatible = "ti,am654-icssg-intc",
-		.data = &am65x_icssg_intc_data,
+		.data = &am65x_j721e_icssg_intc_data,
+	},
+	{
+		.compatible = "ti,j721e-icssg-intc",
+		.data = &am65x_j721e_icssg_intc_data,
 	},
 	{ /* sentinel */ },
 };

drivers/remoteproc/pru_rproc.c

@@ -49,6 +49,8 @@
 #define PRU1_IRAM_ADDR_MASK	0x38000
 #define RTU0_IRAM_ADDR_MASK	0x4000
 #define RTU1_IRAM_ADDR_MASK	0x6000
+#define TX_PRU0_IRAM_ADDR_MASK	0xa000
+#define TX_PRU1_IRAM_ADDR_MASK	0xc000
 
 /**
  * enum pru_iomem - PRU core memory/register range identifiers
@@ -86,6 +88,7 @@ enum pru_iomem {
  * @fw_has_intc_rsc: boolean flag to indicate INTC config through firmware
  * @is_k3: boolean flag used to indicate the core has increased number of events
  * @is_rtu: boolean flag to indicate the core is a RTU core
+ * @is_tx_pru: boolean flag to indicate the core is a Tx PRU core
  */
 struct pru_rproc {
 	int id;
@@ -112,6 +115,7 @@ struct pru_rproc {
 	unsigned int fw_has_intc_rsc : 1;
 	unsigned int is_k3 : 1;
 	unsigned int is_rtu : 1;
+	unsigned int is_tx_pru : 1;
 };
 
 static void *pru_d_da_to_va(struct pru_rproc *pru, u32 da, int len);
@@ -659,7 +663,8 @@ static void pru_rproc_kick(struct rproc *rproc, int vq_id)
 	struct pru_rproc *pru = rproc->priv;
 	int ret;
 	mbox_msg_t msg = (mbox_msg_t)vq_id;
-	const char *name = pru->is_rtu ? "RTU" : "PRU";
+	const char *name = pru->is_tx_pru ? "Tx_PRU" :
+				(pru->is_rtu ? "RTU" : "PRU");
 
 	dev_dbg(dev, "kicking vqid %d on %s%d\n", vq_id, name, pru->id);
 
@@ -683,7 +688,8 @@ static int pru_rproc_start(struct rproc *rproc)
 {
 	struct device *dev = &rproc->dev;
 	struct pru_rproc *pru = rproc->priv;
-	const char *name = pru->is_rtu ? "RTU" : "PRU";
+	const char *name = pru->is_tx_pru ? "Tx_PRU" :
+				(pru->is_rtu ? "RTU" : "PRU");
 	u32 val;
 	int ret;
 
@@ -726,7 +732,8 @@ static int pru_rproc_stop(struct rproc *rproc)
 {
 	struct device *dev = &rproc->dev;
 	struct pru_rproc *pru = rproc->priv;
-	const char *name = pru->is_rtu ? "RTU" : "PRU";
+	const char *name = pru->is_tx_pru ? "Tx_PRU" :
+				(pru->is_rtu ? "RTU" : "PRU");
 	u32 val;
 
 	dev_dbg(dev, "stopping %s%d\n", name, pru->id);
@@ -1101,12 +1108,19 @@ static int pru_rproc_set_id(struct device_node *np, struct pru_rproc *pru)
 	u32 mask1 = PRU0_IRAM_ADDR_MASK;
 	u32 mask2 = PRU1_IRAM_ADDR_MASK;
 
-	if (of_device_is_compatible(np, "ti,am654-rtu")) {
+	if (of_device_is_compatible(np, "ti,am654-rtu") ||
+	    of_device_is_compatible(np, "ti,j721e-rtu")) {
 		mask1 = RTU0_IRAM_ADDR_MASK;
 		mask2 = RTU1_IRAM_ADDR_MASK;
 		pru->is_rtu = 1;
 	}
 
+	if (of_device_is_compatible(np, "ti,j721e-tx-pru")) {
+		mask1 = TX_PRU0_IRAM_ADDR_MASK;
+		mask2 = TX_PRU1_IRAM_ADDR_MASK;
+		pru->is_tx_pru = 1;
+	}
+
 	if ((pru->mem_regions[PRU_IOMEM_IRAM].pa & mask2) == mask2)
 		pru->id = PRUSS_PRU1;
 	else if ((pru->mem_regions[PRU_IOMEM_IRAM].pa & mask1) == mask1)
@@ -1167,7 +1181,10 @@ static int pru_rproc_probe(struct platform_device *pdev)
 	mutex_init(&pru->lock);
 
 	if (of_device_is_compatible(np, "ti,am654-pru") ||
-	    of_device_is_compatible(np, "ti,am654-rtu")) {
+	    of_device_is_compatible(np, "ti,am654-rtu") ||
+	    of_device_is_compatible(np, "ti,j721e-pru") ||
+	    of_device_is_compatible(np, "ti,j721e-rtu") ||
+	    of_device_is_compatible(np, "ti,j721e-tx-pru")) {
 		/* use generic elf ops for undefined platform driver ops */
 		rproc->ops->load = pru_rproc_load_elf_segments;
 
@@ -1286,6 +1303,9 @@ static const struct of_device_id pru_rproc_match[] = {
 	{ .compatible = "ti,k2g-pru",    },
 	{ .compatible = "ti,am654-pru",  },
 	{ .compatible = "ti,am654-rtu",  },
+	{ .compatible = "ti,j721e-pru",  },
+	{ .compatible = "ti,j721e-rtu",  },
+	{ .compatible = "ti,j721e-tx-pru",  },
 	{},
 };
 MODULE_DEVICE_TABLE(of, pru_rproc_match);

drivers/soc/ti/pruss.c

@@ -363,7 +363,8 @@ static int pruss_probe(struct platform_device *pdev)
 	if (!pruss->cfg_base)
 		return -ENOMEM;
 
-	if (!of_device_is_compatible(pdev->dev.of_node, "ti,am654-icssg"))
+	if (!of_device_is_compatible(pdev->dev.of_node, "ti,am654-icssg") &&
+	    !of_device_is_compatible(pdev->dev.of_node, "ti,j721e-icssg"))
 		goto skip_mux;
 
 	ret = pruss_clk_mux_setup(pruss, pruss->core_clk_mux, "coreclk_mux",
@@ -478,6 +479,7 @@ static const struct of_device_id pruss_of_match[] = {
 	{ .compatible = "ti,am5728-pruss", .data = NULL, },
 	{ .compatible = "ti,k2g-pruss", .data = NULL, },
 	{ .compatible = "ti,am654-icssg", .data = NULL, },
+	{ .compatible = "ti,j721e-icssg", .data = NULL, },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, pruss_of_match);

drivers/soc/ti/pruss_soc_bus.c

@@ -291,6 +291,7 @@ static const struct of_device_id pruss_soc_bus_of_match[] = {
 	{ .compatible = "ti,am5728-pruss-soc-bus", .data = &am57xx_data, },
 	{ .compatible = "ti,k2g-pruss-soc-bus", .data = &k2g_data, },
 	{ .compatible = "ti,am654-icssg-soc-bus", .data = &k2g_data, },
+	{ .compatible = "ti,j721e-icssg-soc-bus", .data = &k2g_data, },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, pruss_soc_bus_of_match);