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@@ -33,7 +33,6 @@
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#include <linux/uaccess.h>
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#include <linux/perf_event.h>
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#include <linux/pm_runtime.h>
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-#include <linux/perf_event.h>
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#include <asm/sections.h>
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#include <asm/local.h>
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@@ -46,7 +45,9 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO);
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/* The number of ETMv4 currently registered */
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static int etm4_count;
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static struct etmv4_drvdata *etmdrvdata[NR_CPUS];
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-static void etm4_set_default(struct etmv4_config *config);
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+static void etm4_set_default_config(struct etmv4_config *config);
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+static int etm4_set_event_filters(struct etmv4_drvdata *drvdata,
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+ struct perf_event *event);
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static enum cpuhp_state hp_online;
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@@ -79,22 +80,8 @@ static int etm4_cpu_id(struct coresight_device *csdev)
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static int etm4_trace_id(struct coresight_device *csdev)
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{
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struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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- unsigned long flags;
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- int trace_id = -1;
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-
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- if (!local_read(&drvdata->mode))
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- return drvdata->trcid;
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-
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- spin_lock_irqsave(&drvdata->spinlock, flags);
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-
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- CS_UNLOCK(drvdata->base);
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- trace_id = readl_relaxed(drvdata->base + TRCTRACEIDR);
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- trace_id &= ETM_TRACEID_MASK;
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- CS_LOCK(drvdata->base);
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- spin_unlock_irqrestore(&drvdata->spinlock, flags);
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-
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- return trace_id;
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+ return drvdata->trcid;
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}
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static void etm4_enable_hw(void *info)
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@@ -113,8 +100,7 @@ static void etm4_enable_hw(void *info)
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/* wait for TRCSTATR.IDLE to go up */
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if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 1))
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dev_err(drvdata->dev,
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- "timeout observed when probing at offset %#x\n",
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- TRCSTATR);
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+ "timeout while waiting for Idle Trace Status\n");
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writel_relaxed(config->pe_sel, drvdata->base + TRCPROCSELR);
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writel_relaxed(config->cfg, drvdata->base + TRCCONFIGR);
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@@ -180,14 +166,20 @@ static void etm4_enable_hw(void *info)
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writel_relaxed(config->vmid_mask0, drvdata->base + TRCVMIDCCTLR0);
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writel_relaxed(config->vmid_mask1, drvdata->base + TRCVMIDCCTLR1);
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+ /*
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+ * Request to keep the trace unit powered and also
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+ * emulation of powerdown
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+ */
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+ writel_relaxed(readl_relaxed(drvdata->base + TRCPDCR) | TRCPDCR_PU,
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+ drvdata->base + TRCPDCR);
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+
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/* Enable the trace unit */
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writel_relaxed(1, drvdata->base + TRCPRGCTLR);
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/* wait for TRCSTATR.IDLE to go back down to '0' */
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if (coresight_timeout(drvdata->base, TRCSTATR, TRCSTATR_IDLE_BIT, 0))
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dev_err(drvdata->dev,
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- "timeout observed when probing at offset %#x\n",
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- TRCSTATR);
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+ "timeout while waiting for Idle Trace Status\n");
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CS_LOCK(drvdata->base);
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@@ -195,12 +187,16 @@ static void etm4_enable_hw(void *info)
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}
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static int etm4_parse_event_config(struct etmv4_drvdata *drvdata,
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- struct perf_event_attr *attr)
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+ struct perf_event *event)
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{
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+ int ret = 0;
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struct etmv4_config *config = &drvdata->config;
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+ struct perf_event_attr *attr = &event->attr;
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- if (!attr)
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- return -EINVAL;
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+ if (!attr) {
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+ ret = -EINVAL;
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+ goto out;
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+ }
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/* Clear configuration from previous run */
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memset(config, 0, sizeof(struct etmv4_config));
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@@ -212,14 +208,12 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata,
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config->mode = ETM_MODE_EXCL_USER;
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/* Always start from the default config */
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- etm4_set_default(config);
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+ etm4_set_default_config(config);
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- /*
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- * By default the tracers are configured to trace the whole address
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- * range. Narrow the field only if requested by user space.
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- */
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- if (config->mode)
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- etm4_config_trace_mode(config);
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+ /* Configure filters specified on the perf cmd line, if any. */
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+ ret = etm4_set_event_filters(drvdata, event);
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+ if (ret)
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+ goto out;
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/* Go from generic option to ETMv4 specifics */
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if (attr->config & BIT(ETM_OPT_CYCACC))
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@@ -227,23 +221,30 @@ static int etm4_parse_event_config(struct etmv4_drvdata *drvdata,
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if (attr->config & BIT(ETM_OPT_TS))
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config->cfg |= ETMv4_MODE_TIMESTAMP;
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- return 0;
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+out:
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+ return ret;
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}
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static int etm4_enable_perf(struct coresight_device *csdev,
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- struct perf_event_attr *attr)
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+ struct perf_event *event)
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{
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+ int ret = 0;
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struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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- if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))
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- return -EINVAL;
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+ if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id())) {
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+ ret = -EINVAL;
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+ goto out;
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+ }
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/* Configure the tracer based on the session's specifics */
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- etm4_parse_event_config(drvdata, attr);
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+ ret = etm4_parse_event_config(drvdata, event);
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+ if (ret)
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+ goto out;
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/* And enable it */
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etm4_enable_hw(drvdata);
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- return 0;
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+out:
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+ return ret;
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}
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static int etm4_enable_sysfs(struct coresight_device *csdev)
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@@ -274,7 +275,7 @@ err:
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}
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static int etm4_enable(struct coresight_device *csdev,
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- struct perf_event_attr *attr, u32 mode)
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+ struct perf_event *event, u32 mode)
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{
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int ret;
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u32 val;
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@@ -291,7 +292,7 @@ static int etm4_enable(struct coresight_device *csdev,
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ret = etm4_enable_sysfs(csdev);
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break;
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case CS_MODE_PERF:
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- ret = etm4_enable_perf(csdev, attr);
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+ ret = etm4_enable_perf(csdev, event);
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break;
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default:
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ret = -EINVAL;
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@@ -311,6 +312,11 @@ static void etm4_disable_hw(void *info)
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CS_UNLOCK(drvdata->base);
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+ /* power can be removed from the trace unit now */
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+ control = readl_relaxed(drvdata->base + TRCPDCR);
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+ control &= ~TRCPDCR_PU;
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+ writel_relaxed(control, drvdata->base + TRCPDCR);
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+
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control = readl_relaxed(drvdata->base + TRCPRGCTLR);
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/* EN, bit[0] Trace unit enable bit */
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@@ -326,14 +332,28 @@ static void etm4_disable_hw(void *info)
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dev_dbg(drvdata->dev, "cpu: %d disable smp call done\n", drvdata->cpu);
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}
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-static int etm4_disable_perf(struct coresight_device *csdev)
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+static int etm4_disable_perf(struct coresight_device *csdev,
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+ struct perf_event *event)
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{
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+ u32 control;
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+ struct etm_filters *filters = event->hw.addr_filters;
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struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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if (WARN_ON_ONCE(drvdata->cpu != smp_processor_id()))
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return -EINVAL;
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etm4_disable_hw(drvdata);
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+
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+ /*
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+ * Check if the start/stop logic was active when the unit was stopped.
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+ * That way we can re-enable the start/stop logic when the process is
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+ * scheduled again. Configuration of the start/stop logic happens in
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+ * function etm4_set_event_filters().
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+ */
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+ control = readl_relaxed(drvdata->base + TRCVICTLR);
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+ /* TRCVICTLR::SSSTATUS, bit[9] */
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+ filters->ssstatus = (control & BIT(9));
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+
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return 0;
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}
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@@ -362,7 +382,8 @@ static void etm4_disable_sysfs(struct coresight_device *csdev)
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dev_info(drvdata->dev, "ETM tracing disabled\n");
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}
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-static void etm4_disable(struct coresight_device *csdev)
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+static void etm4_disable(struct coresight_device *csdev,
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+ struct perf_event *event)
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{
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u32 mode;
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struct etmv4_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
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@@ -381,7 +402,7 @@ static void etm4_disable(struct coresight_device *csdev)
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etm4_disable_sysfs(csdev);
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break;
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case CS_MODE_PERF:
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- etm4_disable_perf(csdev);
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+ etm4_disable_perf(csdev, event);
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break;
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}
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@@ -564,21 +585,8 @@ static void etm4_init_arch_data(void *info)
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CS_LOCK(drvdata->base);
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}
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-static void etm4_set_default(struct etmv4_config *config)
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+static void etm4_set_default_config(struct etmv4_config *config)
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{
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- if (WARN_ON_ONCE(!config))
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- return;
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-
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- /*
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- * Make default initialisation trace everything
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- *
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- * Select the "always true" resource selector on the
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- * "Enablign Event" line and configure address range comparator
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- * '0' to trace all the possible address range. From there
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- * configure the "include/exclude" engine to include address
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- * range comparator '0'.
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- */
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-
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/* disable all events tracing */
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config->eventctrl0 = 0x0;
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config->eventctrl1 = 0x0;
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@@ -594,6 +602,108 @@ static void etm4_set_default(struct etmv4_config *config)
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/* TRCVICTLR::EVENT = 0x01, select the always on logic */
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config->vinst_ctrl |= BIT(0);
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+}
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+
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+static u64 etm4_get_access_type(struct etmv4_config *config)
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+{
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+ u64 access_type = 0;
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+
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+ /*
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+ * EXLEVEL_NS, bits[15:12]
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+ * The Exception levels are:
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+ * Bit[12] Exception level 0 - Application
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+ * Bit[13] Exception level 1 - OS
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+ * Bit[14] Exception level 2 - Hypervisor
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+ * Bit[15] Never implemented
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+ *
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+ * Always stay away from hypervisor mode.
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+ */
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+ access_type = ETM_EXLEVEL_NS_HYP;
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+
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+ if (config->mode & ETM_MODE_EXCL_KERN)
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+ access_type |= ETM_EXLEVEL_NS_OS;
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+
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+ if (config->mode & ETM_MODE_EXCL_USER)
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+ access_type |= ETM_EXLEVEL_NS_APP;
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+
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+ /*
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+ * EXLEVEL_S, bits[11:8], don't trace anything happening
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+ * in secure state.
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+ */
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+ access_type |= (ETM_EXLEVEL_S_APP |
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+ ETM_EXLEVEL_S_OS |
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+ ETM_EXLEVEL_S_HYP);
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+
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+ return access_type;
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+}
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+
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+static void etm4_set_comparator_filter(struct etmv4_config *config,
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+ u64 start, u64 stop, int comparator)
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+{
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+ u64 access_type = etm4_get_access_type(config);
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+
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+ /* First half of default address comparator */
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+ config->addr_val[comparator] = start;
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+ config->addr_acc[comparator] = access_type;
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+ config->addr_type[comparator] = ETM_ADDR_TYPE_RANGE;
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+
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+ /* Second half of default address comparator */
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+ config->addr_val[comparator + 1] = stop;
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+ config->addr_acc[comparator + 1] = access_type;
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+ config->addr_type[comparator + 1] = ETM_ADDR_TYPE_RANGE;
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+
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+ /*
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+ * Configure the ViewInst function to include this address range
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+ * comparator.
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+ *
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+ * @comparator is divided by two since it is the index in the
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+ * etmv4_config::addr_val array but register TRCVIIECTLR deals with
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+ * address range comparator _pairs_.
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+ *
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+ * Therefore:
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+ * index 0 -> compatator pair 0
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+ * index 2 -> comparator pair 1
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+ * index 4 -> comparator pair 2
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+ * ...
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+ * index 14 -> comparator pair 7
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+ */
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+ config->viiectlr |= BIT(comparator / 2);
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+}
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+
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+static void etm4_set_start_stop_filter(struct etmv4_config *config,
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+ u64 address, int comparator,
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+ enum etm_addr_type type)
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+{
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+ int shift;
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+ u64 access_type = etm4_get_access_type(config);
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+
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+ /* Configure the comparator */
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+ config->addr_val[comparator] = address;
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+ config->addr_acc[comparator] = access_type;
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+ config->addr_type[comparator] = type;
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+
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+ /*
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+ * Configure ViewInst Start-Stop control register.
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+ * Addresses configured to start tracing go from bit 0 to n-1,
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+ * while those configured to stop tracing from 16 to 16 + n-1.
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+ */
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+ shift = (type == ETM_ADDR_TYPE_START ? 0 : 16);
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+ config->vissctlr |= BIT(shift + comparator);
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+}
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+
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+static void etm4_set_default_filter(struct etmv4_config *config)
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+{
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+ u64 start, stop;
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+
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+ /*
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+ * Configure address range comparator '0' to encompass all
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+ * possible addresses.
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+ */
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+ start = 0x0;
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+ stop = ~0x0;
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+
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+ etm4_set_comparator_filter(config, start, stop,
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+ ETM_DEFAULT_ADDR_COMP);
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/*
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* TRCVICTLR::SSSTATUS == 1, the start-stop logic is
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@@ -601,43 +711,156 @@ static void etm4_set_default(struct etmv4_config *config)
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*/
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config->vinst_ctrl |= BIT(9);
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+ /* No start-stop filtering for ViewInst */
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+ config->vissctlr = 0x0;
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+}
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+
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+static void etm4_set_default(struct etmv4_config *config)
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+{
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+ if (WARN_ON_ONCE(!config))
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+ return;
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+
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/*
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- * Configure address range comparator '0' to encompass all
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- * possible addresses.
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+ * Make default initialisation trace everything
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+ *
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+ * Select the "always true" resource selector on the
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+ * "Enablign Event" line and configure address range comparator
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+ * '0' to trace all the possible address range. From there
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+ * configure the "include/exclude" engine to include address
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+ * range comparator '0'.
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*/
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+ etm4_set_default_config(config);
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+ etm4_set_default_filter(config);
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+}
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- /* First half of default address comparator: start at address 0 */
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- config->addr_val[ETM_DEFAULT_ADDR_COMP] = 0x0;
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- /* trace instruction addresses */
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- config->addr_acc[ETM_DEFAULT_ADDR_COMP] &= ~(BIT(0) | BIT(1));
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- /* EXLEVEL_NS, bits[12:15], only trace application and kernel space */
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- config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= ETM_EXLEVEL_NS_HYP;
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- /* EXLEVEL_S, bits[11:8], don't trace anything in secure state */
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- config->addr_acc[ETM_DEFAULT_ADDR_COMP] |= (ETM_EXLEVEL_S_APP |
|
|
|
- ETM_EXLEVEL_S_OS |
|
|
|
- ETM_EXLEVEL_S_HYP);
|
|
|
- config->addr_type[ETM_DEFAULT_ADDR_COMP] = ETM_ADDR_TYPE_RANGE;
|
|
|
+static int etm4_get_next_comparator(struct etmv4_drvdata *drvdata, u32 type)
|
|
|
+{
|
|
|
+ int nr_comparator, index = 0;
|
|
|
+ struct etmv4_config *config = &drvdata->config;
|
|
|
|
|
|
/*
|
|
|
- * Second half of default address comparator: go all
|
|
|
- * the way to the top.
|
|
|
- */
|
|
|
- config->addr_val[ETM_DEFAULT_ADDR_COMP + 1] = ~0x0;
|
|
|
- /* trace instruction addresses */
|
|
|
- config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] &= ~(BIT(0) | BIT(1));
|
|
|
- /* Address comparator type must be equal for both halves */
|
|
|
- config->addr_acc[ETM_DEFAULT_ADDR_COMP + 1] =
|
|
|
- config->addr_acc[ETM_DEFAULT_ADDR_COMP];
|
|
|
- config->addr_type[ETM_DEFAULT_ADDR_COMP + 1] = ETM_ADDR_TYPE_RANGE;
|
|
|
+ * nr_addr_cmp holds the number of comparator _pair_, so time 2
|
|
|
+ * for the total number of comparators.
|
|
|
+ */
|
|
|
+ nr_comparator = drvdata->nr_addr_cmp * 2;
|
|
|
+
|
|
|
+ /* Go through the tally of comparators looking for a free one. */
|
|
|
+ while (index < nr_comparator) {
|
|
|
+ switch (type) {
|
|
|
+ case ETM_ADDR_TYPE_RANGE:
|
|
|
+ if (config->addr_type[index] == ETM_ADDR_TYPE_NONE &&
|
|
|
+ config->addr_type[index + 1] == ETM_ADDR_TYPE_NONE)
|
|
|
+ return index;
|
|
|
+
|
|
|
+ /* Address range comparators go in pairs */
|
|
|
+ index += 2;
|
|
|
+ break;
|
|
|
+ case ETM_ADDR_TYPE_START:
|
|
|
+ case ETM_ADDR_TYPE_STOP:
|
|
|
+ if (config->addr_type[index] == ETM_ADDR_TYPE_NONE)
|
|
|
+ return index;
|
|
|
+
|
|
|
+ /* Start/stop address can have odd indexes */
|
|
|
+ index += 1;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ return -EINVAL;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ /* If we are here all the comparators have been used. */
|
|
|
+ return -ENOSPC;
|
|
|
+}
|
|
|
+
|
|
|
+static int etm4_set_event_filters(struct etmv4_drvdata *drvdata,
|
|
|
+ struct perf_event *event)
|
|
|
+{
|
|
|
+ int i, comparator, ret = 0;
|
|
|
+ u64 address;
|
|
|
+ struct etmv4_config *config = &drvdata->config;
|
|
|
+ struct etm_filters *filters = event->hw.addr_filters;
|
|
|
+
|
|
|
+ if (!filters)
|
|
|
+ goto default_filter;
|
|
|
+
|
|
|
+ /* Sync events with what Perf got */
|
|
|
+ perf_event_addr_filters_sync(event);
|
|
|
|
|
|
/*
|
|
|
- * Configure the ViewInst function to filter on address range
|
|
|
- * comparator '0'.
|
|
|
+ * If there are no filters to deal with simply go ahead with
|
|
|
+ * the default filter, i.e the entire address range.
|
|
|
*/
|
|
|
- config->viiectlr = BIT(0);
|
|
|
+ if (!filters->nr_filters)
|
|
|
+ goto default_filter;
|
|
|
+
|
|
|
+ for (i = 0; i < filters->nr_filters; i++) {
|
|
|
+ struct etm_filter *filter = &filters->etm_filter[i];
|
|
|
+ enum etm_addr_type type = filter->type;
|
|
|
+
|
|
|
+ /* See if a comparator is free. */
|
|
|
+ comparator = etm4_get_next_comparator(drvdata, type);
|
|
|
+ if (comparator < 0) {
|
|
|
+ ret = comparator;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+
|
|
|
+ switch (type) {
|
|
|
+ case ETM_ADDR_TYPE_RANGE:
|
|
|
+ etm4_set_comparator_filter(config,
|
|
|
+ filter->start_addr,
|
|
|
+ filter->stop_addr,
|
|
|
+ comparator);
|
|
|
+ /*
|
|
|
+ * TRCVICTLR::SSSTATUS == 1, the start-stop logic is
|
|
|
+ * in the started state
|
|
|
+ */
|
|
|
+ config->vinst_ctrl |= BIT(9);
|
|
|
+
|
|
|
+ /* No start-stop filtering for ViewInst */
|
|
|
+ config->vissctlr = 0x0;
|
|
|
+ break;
|
|
|
+ case ETM_ADDR_TYPE_START:
|
|
|
+ case ETM_ADDR_TYPE_STOP:
|
|
|
+ /* Get the right start or stop address */
|
|
|
+ address = (type == ETM_ADDR_TYPE_START ?
|
|
|
+ filter->start_addr :
|
|
|
+ filter->stop_addr);
|
|
|
+
|
|
|
+ /* Configure comparator */
|
|
|
+ etm4_set_start_stop_filter(config, address,
|
|
|
+ comparator, type);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * If filters::ssstatus == 1, trace acquisition was
|
|
|
+ * started but the process was yanked away before the
|
|
|
+ * the stop address was hit. As such the start/stop
|
|
|
+ * logic needs to be re-started so that tracing can
|
|
|
+ * resume where it left.
|
|
|
+ *
|
|
|
+ * The start/stop logic status when a process is
|
|
|
+ * scheduled out is checked in function
|
|
|
+ * etm4_disable_perf().
|
|
|
+ */
|
|
|
+ if (filters->ssstatus)
|
|
|
+ config->vinst_ctrl |= BIT(9);
|
|
|
+
|
|
|
+ /* No include/exclude filtering for ViewInst */
|
|
|
+ config->viiectlr = 0x0;
|
|
|
+ break;
|
|
|
+ default:
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto out;
|
|
|
+ }
|
|
|
+ }
|
|
|
|
|
|
- /* no start-stop filtering for ViewInst */
|
|
|
- config->vissctlr = 0x0;
|
|
|
+ goto out;
|
|
|
+
|
|
|
+
|
|
|
+default_filter:
|
|
|
+ etm4_set_default_filter(config);
|
|
|
+
|
|
|
+out:
|
|
|
+ return ret;
|
|
|
}
|
|
|
|
|
|
void etm4_config_trace_mode(struct etmv4_config *config)
|
|
|
@@ -727,13 +950,9 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
|
|
|
struct coresight_platform_data *pdata = NULL;
|
|
|
struct etmv4_drvdata *drvdata;
|
|
|
struct resource *res = &adev->res;
|
|
|
- struct coresight_desc *desc;
|
|
|
+ struct coresight_desc desc = { 0 };
|
|
|
struct device_node *np = adev->dev.of_node;
|
|
|
|
|
|
- desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
|
|
|
- if (!desc)
|
|
|
- return -ENOMEM;
|
|
|
-
|
|
|
drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
|
|
|
if (!drvdata)
|
|
|
return -ENOMEM;
|
|
|
@@ -788,13 +1007,13 @@ static int etm4_probe(struct amba_device *adev, const struct amba_id *id)
|
|
|
etm4_init_trace_id(drvdata);
|
|
|
etm4_set_default(&drvdata->config);
|
|
|
|
|
|
- desc->type = CORESIGHT_DEV_TYPE_SOURCE;
|
|
|
- desc->subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;
|
|
|
- desc->ops = &etm4_cs_ops;
|
|
|
- desc->pdata = pdata;
|
|
|
- desc->dev = dev;
|
|
|
- desc->groups = coresight_etmv4_groups;
|
|
|
- drvdata->csdev = coresight_register(desc);
|
|
|
+ desc.type = CORESIGHT_DEV_TYPE_SOURCE;
|
|
|
+ desc.subtype.source_subtype = CORESIGHT_DEV_SUBTYPE_SOURCE_PROC;
|
|
|
+ desc.ops = &etm4_cs_ops;
|
|
|
+ desc.pdata = pdata;
|
|
|
+ desc.dev = dev;
|
|
|
+ desc.groups = coresight_etmv4_groups;
|
|
|
+ drvdata->csdev = coresight_register(&desc);
|
|
|
if (IS_ERR(drvdata->csdev)) {
|
|
|
ret = PTR_ERR(drvdata->csdev);
|
|
|
goto err_arch_supported;
|
|
|
@@ -826,12 +1045,12 @@ err_arch_supported:
|
|
|
}
|
|
|
|
|
|
static struct amba_id etm4_ids[] = {
|
|
|
- { /* ETM 4.0 - Qualcomm */
|
|
|
- .id = 0x0003b95d,
|
|
|
- .mask = 0x0003ffff,
|
|
|
+ { /* ETM 4.0 - Cortex-A53 */
|
|
|
+ .id = 0x000bb95d,
|
|
|
+ .mask = 0x000fffff,
|
|
|
.data = "ETM 4.0",
|
|
|
},
|
|
|
- { /* ETM 4.0 - Juno board */
|
|
|
+ { /* ETM 4.0 - Cortex-A57 */
|
|
|
.id = 0x000bb95e,
|
|
|
.mask = 0x000fffff,
|
|
|
.data = "ETM 4.0",
|