|
|
@@ -684,10 +684,9 @@ static void bcm_sf2_sw_fixed_link_update(struct dsa_switch *ds, int port,
|
|
|
struct fixed_phy_status *status)
|
|
|
{
|
|
|
struct bcm_sf2_priv *priv = ds_to_priv(ds);
|
|
|
- u32 link, duplex, pause, speed;
|
|
|
+ u32 duplex, pause, speed;
|
|
|
u32 reg;
|
|
|
|
|
|
- link = core_readl(priv, CORE_LNKSTS);
|
|
|
duplex = core_readl(priv, CORE_DUPSTS);
|
|
|
pause = core_readl(priv, CORE_PAUSESTS);
|
|
|
speed = core_readl(priv, CORE_SPDSTS);
|
|
|
@@ -701,22 +700,26 @@ static void bcm_sf2_sw_fixed_link_update(struct dsa_switch *ds, int port,
|
|
|
* which means that we need to force the link at the port override
|
|
|
* level to get the data to flow. We do use what the interrupt handler
|
|
|
* did determine before.
|
|
|
+ *
|
|
|
+ * For the other ports, we just force the link status, since this is
|
|
|
+ * a fixed PHY device.
|
|
|
*/
|
|
|
if (port == 7) {
|
|
|
status->link = priv->port_sts[port].link;
|
|
|
- reg = core_readl(priv, CORE_STS_OVERRIDE_GMIIP_PORT(7));
|
|
|
- reg |= SW_OVERRIDE;
|
|
|
- if (status->link)
|
|
|
- reg |= LINK_STS;
|
|
|
- else
|
|
|
- reg &= ~LINK_STS;
|
|
|
- core_writel(priv, reg, CORE_STS_OVERRIDE_GMIIP_PORT(7));
|
|
|
status->duplex = 1;
|
|
|
} else {
|
|
|
- status->link = !!(link & (1 << port));
|
|
|
+ status->link = 1;
|
|
|
status->duplex = !!(duplex & (1 << port));
|
|
|
}
|
|
|
|
|
|
+ reg = core_readl(priv, CORE_STS_OVERRIDE_GMIIP_PORT(port));
|
|
|
+ reg |= SW_OVERRIDE;
|
|
|
+ if (status->link)
|
|
|
+ reg |= LINK_STS;
|
|
|
+ else
|
|
|
+ reg &= ~LINK_STS;
|
|
|
+ core_writel(priv, reg, CORE_STS_OVERRIDE_GMIIP_PORT(port));
|
|
|
+
|
|
|
switch (speed) {
|
|
|
case SPDSTS_10:
|
|
|
status->speed = SPEED_10;
|