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@@ -137,7 +137,7 @@
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#size-cells = <1>;
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#size-cells = <1>;
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ranges = <0 3 0 0x200000>;
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ranges = <0 3 0 0x200000>;
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- v2m_sysctl: sysctl@020000 {
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+ v2m_sysctl: sysctl@20000 {
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compatible = "arm,sp810", "arm,primecell";
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compatible = "arm,sp810", "arm,primecell";
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reg = <0x020000 0x1000>;
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reg = <0x020000 0x1000>;
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clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
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clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&mb_clk24mhz>;
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@@ -148,7 +148,7 @@
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assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
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assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
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};
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};
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- apbregs@010000 {
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+ apbregs@10000 {
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compatible = "syscon", "simple-mfd";
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compatible = "syscon", "simple-mfd";
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reg = <0x010000 0x1000>;
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reg = <0x010000 0x1000>;
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@@ -216,7 +216,7 @@
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};
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};
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};
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};
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- mmci@050000 {
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+ mmci@50000 {
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compatible = "arm,pl180", "arm,primecell";
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compatible = "arm,pl180", "arm,primecell";
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reg = <0x050000 0x1000>;
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reg = <0x050000 0x1000>;
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interrupts = <5>;
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interrupts = <5>;
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@@ -228,7 +228,7 @@
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clock-names = "mclk", "apb_pclk";
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clock-names = "mclk", "apb_pclk";
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};
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};
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- kmi@060000 {
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+ kmi@60000 {
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compatible = "arm,pl050", "arm,primecell";
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x060000 0x1000>;
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reg = <0x060000 0x1000>;
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interrupts = <8>;
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interrupts = <8>;
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@@ -236,7 +236,7 @@
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clock-names = "KMIREFCLK", "apb_pclk";
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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};
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- kmi@070000 {
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+ kmi@70000 {
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compatible = "arm,pl050", "arm,primecell";
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compatible = "arm,pl050", "arm,primecell";
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reg = <0x070000 0x1000>;
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reg = <0x070000 0x1000>;
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interrupts = <8>;
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interrupts = <8>;
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@@ -244,7 +244,7 @@
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clock-names = "KMIREFCLK", "apb_pclk";
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clock-names = "KMIREFCLK", "apb_pclk";
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};
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};
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- wdt@0f0000 {
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+ wdt@f0000 {
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compatible = "arm,sp805", "arm,primecell";
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compatible = "arm,sp805", "arm,primecell";
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reg = <0x0f0000 0x10000>;
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reg = <0x0f0000 0x10000>;
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interrupts = <7>;
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interrupts = <7>;
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