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@@ -187,14 +187,14 @@ static void mpc85xx_pci_check(struct edac_pci_ctl_info *pci)
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static void mpc85xx_pcie_check(struct edac_pci_ctl_info *pci)
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{
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struct mpc85xx_pci_pdata *pdata = pci->pvt_info;
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- u32 err_detect;
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+ u32 err_detect, err_cap_stat;
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err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR);
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+ err_cap_stat = in_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR);
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pr_err("PCIe error(s) detected\n");
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pr_err("PCIe ERR_DR register: 0x%08x\n", err_detect);
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- pr_err("PCIe ERR_CAP_STAT register: 0x%08x\n",
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- in_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR));
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+ pr_err("PCIe ERR_CAP_STAT register: 0x%08x\n", err_cap_stat);
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pr_err("PCIe ERR_CAP_R0 register: 0x%08x\n",
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in_be32(pdata->pci_vbase + MPC85XX_PCIE_ERR_CAP_R0));
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pr_err("PCIe ERR_CAP_R1 register: 0x%08x\n",
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@@ -206,6 +206,9 @@ static void mpc85xx_pcie_check(struct edac_pci_ctl_info *pci)
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/* clear error bits */
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out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
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+
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+ /* reset error capture */
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+ out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, err_cap_stat | 0x1);
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}
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static int mpc85xx_pcie_find_capability(struct device_node *np)
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@@ -344,6 +347,9 @@ static int mpc85xx_pci_err_probe(struct platform_device *op)
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/* clear error bits */
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out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0);
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+ /* reset error capture */
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+ out_be32(pdata->pci_vbase + MPC85XX_PCI_GAS_TIMR, 0x1);
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+
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if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
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edac_dbg(3, "failed edac_pci_add_device()\n");
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goto err;
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