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@@ -16,14 +16,44 @@
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#ifndef __ASM_PGTABLE_HWDEF_H
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#define __ASM_PGTABLE_HWDEF_H
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-#if CONFIG_ARM64_PGTABLE_LEVELS == 2
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-#include <asm/pgtable-2level-hwdef.h>
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-#elif CONFIG_ARM64_PGTABLE_LEVELS == 3
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-#include <asm/pgtable-3level-hwdef.h>
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-#else
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-#include <asm/pgtable-4level-hwdef.h>
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+#define PTRS_PER_PTE (1 << (PAGE_SHIFT - 3))
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+
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+/*
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+ * PMD_SHIFT determines the size a level 2 page table entry can map.
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+ */
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+#if CONFIG_ARM64_PGTABLE_LEVELS > 2
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+#define PMD_SHIFT ((PAGE_SHIFT - 3) * 2 + 3)
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+#define PMD_SIZE (_AC(1, UL) << PMD_SHIFT)
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+#define PMD_MASK (~(PMD_SIZE-1))
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+#define PTRS_PER_PMD PTRS_PER_PTE
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+#endif
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+
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+/*
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+ * PUD_SHIFT determines the size a level 1 page table entry can map.
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+ */
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+#if CONFIG_ARM64_PGTABLE_LEVELS > 3
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+#define PUD_SHIFT ((PAGE_SHIFT - 3) * 3 + 3)
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+#define PUD_SIZE (_AC(1, UL) << PUD_SHIFT)
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+#define PUD_MASK (~(PUD_SIZE-1))
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+#define PTRS_PER_PUD PTRS_PER_PTE
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#endif
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+/*
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+ * PGDIR_SHIFT determines the size a top-level page table entry can map
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+ * (depending on the configuration, this level can be 0, 1 or 2).
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+ */
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+#define PGDIR_SHIFT ((PAGE_SHIFT - 3) * CONFIG_ARM64_PGTABLE_LEVELS + 3)
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+#define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
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+#define PGDIR_MASK (~(PGDIR_SIZE-1))
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+#define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT))
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+
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+/*
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+ * Section address mask and size definitions.
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+ */
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+#define SECTION_SHIFT PMD_SHIFT
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+#define SECTION_SIZE (_AC(1, UL) << SECTION_SHIFT)
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+#define SECTION_MASK (~(SECTION_SIZE-1))
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+
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/*
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* Hardware page table definitions.
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*
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