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MIPS: CPS: Initialize EVA before bringing up VPEs from secondary cores

The CPS code is doing several memory loads when configuring the VPEs
from secondary cores, so the segmentation control registers must be
initialized in time otherwise the kernel will crash with strange
TLB exceptions.

Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Patchwork: http://patchwork.linux-mips.org/patch/7424/
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Markos Chandras 11 ani în urmă
părinte
comite
6521d9a436
1 a modificat fișierele cu 4 adăugiri și 0 ștergeri
  1. 4 0
      arch/mips/kernel/cps-vec.S

+ 4 - 0
arch/mips/kernel/cps-vec.S

@@ -13,6 +13,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/asm-offsets.h>
 #include <asm/asmmacro.h>
 #include <asm/asmmacro.h>
 #include <asm/cacheops.h>
 #include <asm/cacheops.h>
+#include <asm/eva.h>
 #include <asm/mipsregs.h>
 #include <asm/mipsregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/mipsmtregs.h>
 #include <asm/pm.h>
 #include <asm/pm.h>
@@ -166,6 +167,9 @@ dcache_done:
 1:	jal	mips_cps_core_init
 1:	jal	mips_cps_core_init
 	 nop
 	 nop
 
 
+	/* Do any EVA initialization if necessary */
+	eva_init
+
 	/*
 	/*
 	 * Boot any other VPEs within this core that should be online, and
 	 * Boot any other VPEs within this core that should be online, and
 	 * deactivate this VPE if it should be offline.
 	 * deactivate this VPE if it should be offline.