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@@ -78,6 +78,11 @@ static void artpec6_pcie_writel(struct artpec6_pcie *artpec6_pcie, u32 offset, u
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regmap_write(artpec6_pcie->regmap, offset, val);
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}
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+static u64 artpec6_pcie_cpu_addr_fixup(u64 pci_addr)
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+{
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+ return pci_addr & ARTPEC6_CPU_TO_BUS_ADDR;
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+}
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+
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static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6_pcie)
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{
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struct dw_pcie *pci = artpec6_pcie->pci;
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@@ -142,11 +147,6 @@ static int artpec6_pcie_establish_link(struct artpec6_pcie *artpec6_pcie)
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*/
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dw_pcie_writel_dbi(pci, MISC_CONTROL_1_OFF, DBI_RO_WR_EN);
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- pp->io_base &= ARTPEC6_CPU_TO_BUS_ADDR;
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- pp->mem_base &= ARTPEC6_CPU_TO_BUS_ADDR;
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- pp->cfg0_base &= ARTPEC6_CPU_TO_BUS_ADDR;
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- pp->cfg1_base &= ARTPEC6_CPU_TO_BUS_ADDR;
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-
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/* setup root complex */
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dw_pcie_setup_rc(pp);
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@@ -235,6 +235,7 @@ static int artpec6_add_pcie_port(struct artpec6_pcie *artpec6_pcie,
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}
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static const struct dw_pcie_ops dw_pcie_ops = {
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+ .cpu_addr_fixup = artpec6_pcie_cpu_addr_fixup,
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};
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static int artpec6_pcie_probe(struct platform_device *pdev)
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