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@@ -252,6 +252,7 @@
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<0 1 IRQ_TYPE_LEVEL_HIGH>,
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<0 1 IRQ_TYPE_LEVEL_HIGH>,
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<0 2 IRQ_TYPE_LEVEL_HIGH>,
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<0 2 IRQ_TYPE_LEVEL_HIGH>,
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<0 3 IRQ_TYPE_LEVEL_HIGH>;
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<0 3 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&mstp4_clks R8A7790_CLK_IRQC>;
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};
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};
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dmac0: dma-controller@e6700000 {
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dmac0: dma-controller@e6700000 {
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@@ -1158,6 +1159,14 @@
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"iic0", "pciec", "iic1", "ssusb", "cmt1",
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"iic0", "pciec", "iic1", "ssusb", "cmt1",
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"usbdmac0", "usbdmac1";
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"usbdmac0", "usbdmac1";
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};
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};
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+ mstp4_clks: mstp4_clks@e6150140 {
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+ compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
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+ reg = <0 0xe6150140 0 4>, <0 0xe615004c 0 4>;
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+ clocks = <&cp_clk>;
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+ #clock-cells = <1>;
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+ clock-indices = <R8A7790_CLK_IRQC>;
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+ clock-output-names = "irqc";
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+ };
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mstp5_clks: mstp5_clks@e6150144 {
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mstp5_clks: mstp5_clks@e6150144 {
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compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
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compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
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reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
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reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>;
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