clk: keystone: sci-clk: add slack to clk-set-rate passed to firmware

Add some slack to the clock frequency parameters passed to firmware
within clk_set_rate. min-freq is changed to 0 and max-rate is changed to
ULONG_MAX. This fixes certain issues with pll clock rounding.

Signed-off-by: Tero Kristo <t-kristo@ti.com>

drivers/clk/keystone/sci-clk.c

@@ -206,7 +206,7 @@ static int sci_clk_set_rate(struct clk_hw *hw, unsigned long rate,
 	struct sci_clk *clk = to_sci_clk(hw);
 
 	return clk->provider->ops->set_freq(clk->provider->sci, clk->dev_id,
-					    clk->clk_id, rate, rate, rate);
+					    clk->clk_id, 0, rate, ULONG_MAX);
 }
 
 /**