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@@ -3414,6 +3414,29 @@ int pci_wait_for_pending_transaction(struct pci_dev *dev)
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}
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EXPORT_SYMBOL(pci_wait_for_pending_transaction);
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+/*
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+ * We should only need to wait 100ms after FLR, but some devices take longer.
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+ * Wait for up to 1000ms for config space to return something other than -1.
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+ * Intel IGD requires this when an LCD panel is attached. We read the 2nd
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+ * dword because VFs don't implement the 1st dword.
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+ */
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+static void pci_flr_wait(struct pci_dev *dev)
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+{
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+ int i = 0;
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+ u32 id;
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+
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+ do {
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+ msleep(100);
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+ pci_read_config_dword(dev, PCI_COMMAND, &id);
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+ } while (i++ < 10 && id == ~0);
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+
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+ if (id == ~0)
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+ dev_warn(&dev->dev, "Failed to return from FLR\n");
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+ else if (i > 1)
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+ dev_info(&dev->dev, "Required additional %dms to return from FLR\n",
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+ (i - 1) * 100);
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+}
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+
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static int pcie_flr(struct pci_dev *dev, int probe)
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{
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u32 cap;
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@@ -3429,7 +3452,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
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dev_err(&dev->dev, "timed out waiting for pending transaction; performing function level reset anyway\n");
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pcie_capability_set_word(dev, PCI_EXP_DEVCTL, PCI_EXP_DEVCTL_BCR_FLR);
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- msleep(100);
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+ pci_flr_wait(dev);
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return 0;
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}
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@@ -3459,7 +3482,7 @@ static int pci_af_flr(struct pci_dev *dev, int probe)
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dev_err(&dev->dev, "timed out waiting for pending transaction; performing AF function level reset anyway\n");
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pci_write_config_byte(dev, pos + PCI_AF_CTRL, PCI_AF_CTRL_FLR);
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- msleep(100);
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+ pci_flr_wait(dev);
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return 0;
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}
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