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@@ -2624,6 +2624,7 @@ static int smu7_force_dpm_level(struct pp_hwmgr *hwmgr,
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smu7_force_clock_level(hwmgr, PP_SCLK, 1<<sclk_mask);
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smu7_force_clock_level(hwmgr, PP_SCLK, 1<<sclk_mask);
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smu7_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask);
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smu7_force_clock_level(hwmgr, PP_MCLK, 1<<mclk_mask);
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smu7_force_clock_level(hwmgr, PP_PCIE, 1<<pcie_mask);
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smu7_force_clock_level(hwmgr, PP_PCIE, 1<<pcie_mask);
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+
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break;
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break;
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case AMD_DPM_FORCED_LEVEL_MANUAL:
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case AMD_DPM_FORCED_LEVEL_MANUAL:
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hwmgr->dpm_level = level;
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hwmgr->dpm_level = level;
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@@ -2633,9 +2634,9 @@ static int smu7_force_dpm_level(struct pp_hwmgr *hwmgr,
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break;
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break;
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}
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}
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- if (level & (AMD_DPM_FORCED_LEVEL_PROFILE_PEAK | AMD_DPM_FORCED_LEVEL_HIGH))
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+ if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->saved_dpm_level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
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smu7_fan_ctrl_set_fan_speed_percent(hwmgr, 100);
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smu7_fan_ctrl_set_fan_speed_percent(hwmgr, 100);
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- else
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+ else if (level != AMD_DPM_FORCED_LEVEL_PROFILE_PEAK && hwmgr->saved_dpm_level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
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smu7_fan_ctrl_reset_fan_speed_to_default(hwmgr);
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smu7_fan_ctrl_reset_fan_speed_to_default(hwmgr);
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return 0;
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return 0;
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