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@@ -38,7 +38,6 @@
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#define AU1000_SRC_CLK 12000000
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static unsigned int au1x00_clock; /* Hz */
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-static unsigned long uart_baud_base;
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/*
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* Set the au1000_clock
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@@ -54,21 +53,6 @@ unsigned int get_au1x00_speed(void)
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}
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EXPORT_SYMBOL(get_au1x00_speed);
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-/*
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- * The UART baud base is not known at compile time ... if
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- * we want to be able to use the same code on different
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- * speed CPUs.
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- */
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-unsigned long get_au1x00_uart_baud_base(void)
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-{
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- return uart_baud_base;
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-}
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-
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-void set_au1x00_uart_baud_base(unsigned long new_baud_base)
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-{
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- uart_baud_base = new_baud_base;
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-}
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-
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/*
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* We read the real processor speed from the PLL. This is important
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* because it is more accurate than computing it from the 32 KHz
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@@ -95,9 +79,6 @@ unsigned long au1xxx_calc_clock(void)
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/* On Alchemy CPU:counter ratio is 1:1 */
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mips_hpt_frequency = cpu_speed;
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- /* Equation: Baudrate = CPU / (SD * 2 * CLKDIV * 16) */
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- set_au1x00_uart_baud_base(cpu_speed / (2 *
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- ((alchemy_rdsys(AU1000_SYS_POWERCTRL) & 0x03) + 2) * 16));
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set_au1x00_speed(cpu_speed);
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