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@@ -514,20 +514,30 @@ ilk_dummy_write(struct drm_i915_private *dev_priv)
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}
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}
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static void
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static void
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-hsw_unclaimed_reg_clear(struct drm_i915_private *dev_priv, u32 reg)
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+hsw_unclaimed_reg_debug(struct drm_i915_private *dev_priv, u32 reg, bool read,
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+ bool before)
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{
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{
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+ const char *op = read ? "reading" : "writing to";
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+ const char *when = before ? "before" : "after";
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+
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+ if (!i915.mmio_debug)
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+ return;
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+
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if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
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if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
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- DRM_ERROR("Unknown unclaimed register before writing to %x\n",
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- reg);
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+ WARN(1, "Unclaimed register detected %s %s register 0x%x\n",
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+ when, op, reg);
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__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
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__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
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}
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}
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}
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}
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static void
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static void
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-hsw_unclaimed_reg_check(struct drm_i915_private *dev_priv, u32 reg)
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+hsw_unclaimed_reg_detect(struct drm_i915_private *dev_priv)
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{
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{
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+ if (i915.mmio_debug)
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+ return;
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+
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if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
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if (__raw_i915_read32(dev_priv, FPGA_DBG) & FPGA_DBG_RM_NOCLAIM) {
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- DRM_ERROR("Unclaimed write to %x\n", reg);
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+ DRM_ERROR("Unclaimed register detected. Please use the i915.mmio_debug=1 to debug this problem.");
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__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
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__raw_i915_write32(dev_priv, FPGA_DBG, FPGA_DBG_RM_NOCLAIM);
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}
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}
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}
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}
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@@ -564,6 +574,7 @@ gen5_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
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static u##x \
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static u##x \
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gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
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gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
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REG_READ_HEADER(x); \
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REG_READ_HEADER(x); \
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+ hsw_unclaimed_reg_debug(dev_priv, reg, true, true); \
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if (dev_priv->uncore.forcewake_count == 0 && \
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if (dev_priv->uncore.forcewake_count == 0 && \
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NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
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NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
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dev_priv->uncore.funcs.force_wake_get(dev_priv, \
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dev_priv->uncore.funcs.force_wake_get(dev_priv, \
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@@ -574,6 +585,7 @@ gen6_read##x(struct drm_i915_private *dev_priv, off_t reg, bool trace) { \
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} else { \
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} else { \
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val = __raw_i915_read##x(dev_priv, reg); \
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val = __raw_i915_read##x(dev_priv, reg); \
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} \
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} \
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+ hsw_unclaimed_reg_debug(dev_priv, reg, true, false); \
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REG_READ_FOOTER; \
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REG_READ_FOOTER; \
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}
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}
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@@ -700,12 +712,13 @@ hsw_write##x(struct drm_i915_private *dev_priv, off_t reg, u##x val, bool trace)
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if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
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if (NEEDS_FORCE_WAKE((dev_priv), (reg))) { \
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__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
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__fifo_ret = __gen6_gt_wait_for_fifo(dev_priv); \
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} \
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} \
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- hsw_unclaimed_reg_clear(dev_priv, reg); \
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+ hsw_unclaimed_reg_debug(dev_priv, reg, false, true); \
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__raw_i915_write##x(dev_priv, reg, val); \
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__raw_i915_write##x(dev_priv, reg, val); \
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if (unlikely(__fifo_ret)) { \
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if (unlikely(__fifo_ret)) { \
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gen6_gt_check_fifodbg(dev_priv); \
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gen6_gt_check_fifodbg(dev_priv); \
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} \
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} \
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- hsw_unclaimed_reg_check(dev_priv, reg); \
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+ hsw_unclaimed_reg_debug(dev_priv, reg, false, false); \
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+ hsw_unclaimed_reg_detect(dev_priv); \
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REG_WRITE_FOOTER; \
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REG_WRITE_FOOTER; \
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}
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}
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