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@@ -22,6 +22,7 @@
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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+#include "cx231xx.h"
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/module.h>
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@@ -36,7 +37,6 @@
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#include <media/v4l2-common.h>
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#include <media/v4l2-ioctl.h>
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-#include "cx231xx.h"
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#include "cx231xx-dif.h"
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#define TUNER_MODE_FM_RADIO 0
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@@ -83,10 +83,10 @@ void initGPIO(struct cx231xx *dev)
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cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 *)&value, 4, 0, 0);
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verve_read_byte(dev, 0x07, &val);
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- cx231xx_info(" verve_read_byte address0x07=0x%x\n", val);
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+ pr_info(" verve_read_byte address0x07=0x%x\n", val);
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verve_write_byte(dev, 0x07, 0xF4);
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verve_read_byte(dev, 0x07, &val);
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- cx231xx_info(" verve_read_byte address0x07=0x%x\n", val);
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+ pr_info(" verve_read_byte address0x07=0x%x\n", val);
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cx231xx_capture_start(dev, 1, Vbi);
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@@ -156,7 +156,7 @@ int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count)
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while (afe_power_status != 0x18) {
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status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18);
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if (status < 0) {
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- cx231xx_info(
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+ pr_info(
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": Init Super Block failed in send cmd\n");
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break;
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}
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@@ -164,13 +164,13 @@ int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count)
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status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status);
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afe_power_status &= 0xff;
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if (status < 0) {
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- cx231xx_info(
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+ pr_info(
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": Init Super Block failed in receive cmd\n");
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break;
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}
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i++;
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if (i == 10) {
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- cx231xx_info(
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+ pr_info(
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": Init Super Block force break in loop !!!!\n");
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status = -1;
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break;
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@@ -410,7 +410,7 @@ int cx231xx_afe_update_power_control(struct cx231xx *dev,
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status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
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0x00);
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} else {
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- cx231xx_info("Invalid AV mode input\n");
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+ pr_info("Invalid AV mode input\n");
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status = -1;
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}
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break;
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@@ -467,7 +467,7 @@ int cx231xx_afe_update_power_control(struct cx231xx *dev,
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status |= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3,
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0x40);
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} else {
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- cx231xx_info("Invalid AV mode input\n");
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+ pr_info("Invalid AV mode input\n");
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status = -1;
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}
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} /* switch */
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@@ -573,7 +573,7 @@ int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
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status = cx231xx_set_power_mode(dev,
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POLARIS_AVMODE_ENXTERNAL_AV);
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if (status < 0) {
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- cx231xx_errdev("%s: set_power_mode : Failed to"
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+ pr_err("%s: set_power_mode : Failed to"
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" set Power - errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -591,7 +591,7 @@ int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
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status = cx231xx_set_power_mode(dev,
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POLARIS_AVMODE_ANALOGT_TV);
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if (status < 0) {
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- cx231xx_errdev("%s: set_power_mode:Failed"
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+ pr_err("%s: set_power_mode:Failed"
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" to set Power - errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -608,7 +608,7 @@ int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input)
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break;
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default:
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- cx231xx_errdev("%s: set_power_mode : Unknown Input %d !\n",
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+ pr_err("%s: set_power_mode : Unknown Input %d !\n",
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__func__, INPUT(input)->type);
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break;
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}
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@@ -628,7 +628,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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if (pin_type != dev->video_input) {
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status = cx231xx_afe_adjust_ref_count(dev, pin_type);
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if (status < 0) {
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- cx231xx_errdev("%s: adjust_ref_count :Failed to set"
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+ pr_err("%s: adjust_ref_count :Failed to set"
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"AFE input mux - errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -638,7 +638,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* call afe block to set video inputs */
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status = cx231xx_afe_set_input_mux(dev, input);
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if (status < 0) {
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- cx231xx_errdev("%s: set_input_mux :Failed to set"
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+ pr_err("%s: set_input_mux :Failed to set"
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" AFE input mux - errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -670,7 +670,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* Tell DIF object to go to baseband mode */
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status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
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if (status < 0) {
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- cx231xx_errdev("%s: cx231xx_dif set to By pass"
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+ pr_err("%s: cx231xx_dif set to By pass"
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" mode- errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -715,7 +715,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* Tell DIF object to go to baseband mode */
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status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
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if (status < 0) {
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- cx231xx_errdev("%s: cx231xx_dif set to By pass"
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+ pr_err("%s: cx231xx_dif set to By pass"
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" mode- errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -790,7 +790,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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status = cx231xx_dif_set_standard(dev,
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DIF_USE_BASEBAND);
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if (status < 0) {
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- cx231xx_errdev("%s: cx231xx_dif set to By pass"
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+ pr_err("%s: cx231xx_dif set to By pass"
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" mode- errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -826,7 +826,7 @@ int cx231xx_set_decoder_video_input(struct cx231xx *dev,
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/* Reinitialize the DIF */
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status = cx231xx_dif_set_standard(dev, dev->norm);
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if (status < 0) {
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- cx231xx_errdev("%s: cx231xx_dif set to By pass"
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+ pr_err("%s: cx231xx_dif set to By pass"
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" mode- errCode [%d]!\n",
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__func__, status);
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return status;
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@@ -970,14 +970,14 @@ int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
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{
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int status = 0;
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- cx231xx_info("do_mode_ctrl_overrides : 0x%x\n",
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+ pr_info("do_mode_ctrl_overrides : 0x%x\n",
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(unsigned int)dev->norm);
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/* Change the DFE_CTRL3 bp_percent to fix flagging */
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status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280);
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if (dev->norm & (V4L2_STD_NTSC | V4L2_STD_PAL_M)) {
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- cx231xx_info("do_mode_ctrl_overrides NTSC\n");
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+ pr_info("do_mode_ctrl_overrides NTSC\n");
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/* Move the close caption lines out of active video,
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adjust the active video start point */
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@@ -1004,7 +1004,7 @@ int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
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(FLD_HBLANK_CNT, 0x79));
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} else if (dev->norm & V4L2_STD_SECAM) {
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- cx231xx_info("do_mode_ctrl_overrides SECAM\n");
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+ pr_info("do_mode_ctrl_overrides SECAM\n");
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status = cx231xx_read_modify_write_i2c_dword(dev,
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VID_BLK_I2C_ADDRESS,
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VERT_TIM_CTRL,
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@@ -1031,7 +1031,7 @@ int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev)
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cx231xx_set_field
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(FLD_HBLANK_CNT, 0x85));
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} else {
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- cx231xx_info("do_mode_ctrl_overrides PAL\n");
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+ pr_info("do_mode_ctrl_overrides PAL\n");
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status = cx231xx_read_modify_write_i2c_dword(dev,
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VID_BLK_I2C_ADDRESS,
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VERT_TIM_CTRL,
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@@ -1331,109 +1331,109 @@ void cx231xx_dump_HH_reg(struct cx231xx *dev)
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for (i = 0x100; i < 0x140; i++) {
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vid_blk_read_word(dev, i, &value);
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- cx231xx_info("reg0x%x=0x%x\n", i, value);
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+ pr_info("reg0x%x=0x%x\n", i, value);
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i = i+3;
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}
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for (i = 0x300; i < 0x400; i++) {
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vid_blk_read_word(dev, i, &value);
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- cx231xx_info("reg0x%x=0x%x\n", i, value);
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+ pr_info("reg0x%x=0x%x\n", i, value);
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i = i+3;
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}
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for (i = 0x400; i < 0x440; i++) {
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vid_blk_read_word(dev, i, &value);
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- cx231xx_info("reg0x%x=0x%x\n", i, value);
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+ pr_info("reg0x%x=0x%x\n", i, value);
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i = i+3;
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}
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vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
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- cx231xx_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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+ pr_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390);
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vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value);
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- cx231xx_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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+ pr_info("AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value);
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}
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void cx231xx_dump_SC_reg(struct cx231xx *dev)
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{
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u8 value[4] = { 0, 0, 0, 0 };
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- cx231xx_info("cx231xx_dump_SC_reg!\n");
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+ pr_info("cx231xx_dump_SC_reg!\n");
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", BOARD_CFG_STAT, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS_MODE_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_CFG_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS1_LENGTH_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_CFG_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", TS2_LENGTH_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", EP_MODE_SET, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN1, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN2, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_PTN3, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK0, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK1, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_PWR_MASK2, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_GAIN, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG,
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value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_CAR_REG, value[0],
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value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1,
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|
value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG1, value[0],
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|
value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2,
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|
value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", CIR_OT_CFG2, value[0],
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|
value[1], value[2], value[3]);
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cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
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|
value, 4);
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- cx231xx_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0],
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+ pr_info("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, value[0],
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value[1], value[2], value[3]);
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@@ -1503,7 +1503,7 @@ void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
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u32 standard = 0;
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u8 value[4] = { 0, 0, 0, 0 };
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|
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- cx231xx_info("Enter cx231xx_set_Colibri_For_LowIF()\n");
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+ pr_info("Enter cx231xx_set_Colibri_For_LowIF()\n");
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value[0] = (u8) 0x6F;
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value[1] = (u8) 0x6F;
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value[2] = (u8) 0x6F;
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@@ -1523,7 +1523,7 @@ void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
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colibri_carrier_offset = cx231xx_Get_Colibri_CarrierOffset(mode,
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|
standard);
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|
|
|
|
- cx231xx_info("colibri_carrier_offset=%d, standard=0x%x\n",
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|
+ pr_info("colibri_carrier_offset=%d, standard=0x%x\n",
|
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|
colibri_carrier_offset, standard);
|
|
|
|
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|
/* Set the band Pass filter for DIF*/
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|
@@ -1557,7 +1557,7 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
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u64 pll_freq_u64 = 0;
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|
u32 i = 0;
|
|
|
|
|
|
- cx231xx_info("if_freq=%d;spectral_invert=0x%x;mode=0x%x\n",
|
|
|
+ pr_info("if_freq=%d;spectral_invert=0x%x;mode=0x%x\n",
|
|
|
if_freq, spectral_invert, mode);
|
|
|
|
|
|
|
|
|
@@ -1601,7 +1601,7 @@ void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
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|
if_freq = 16000000;
|
|
|
}
|
|
|
|
|
|
- cx231xx_info("Enter IF=%zu\n",
|
|
|
+ pr_info("Enter IF=%zu\n",
|
|
|
ARRAY_SIZE(Dif_set_array));
|
|
|
for (i = 0; i < ARRAY_SIZE(Dif_set_array); i++) {
|
|
|
if (Dif_set_array[i].if_freq == if_freq) {
|
|
|
@@ -1714,7 +1714,7 @@ int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard)
|
|
|
u32 dif_misc_ctrl_value = 0;
|
|
|
u32 func_mode = 0;
|
|
|
|
|
|
- cx231xx_info("%s: setStandard to %x\n", __func__, standard);
|
|
|
+ pr_info("%s: setStandard to %x\n", __func__, standard);
|
|
|
|
|
|
status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value);
|
|
|
if (standard != DIF_USE_BASEBAND)
|
|
|
@@ -2117,7 +2117,7 @@ int cx231xx_tuner_post_channel_change(struct cx231xx *dev)
|
|
|
{
|
|
|
int status = 0;
|
|
|
u32 dwval;
|
|
|
- cx231xx_info("cx231xx_tuner_post_channel_change dev->tuner_type =0%d\n",
|
|
|
+ pr_info("cx231xx_tuner_post_channel_change dev->tuner_type =0%d\n",
|
|
|
dev->tuner_type);
|
|
|
/* Set the RF and IF k_agc values to 4 for PAL/NTSC and 8 for
|
|
|
* SECAM L/B/D standards */
|
|
|
@@ -2219,7 +2219,7 @@ int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode)
|
|
|
if (dev->power_mode != mode)
|
|
|
dev->power_mode = mode;
|
|
|
else {
|
|
|
- cx231xx_info(" setPowerMode::mode = %d, No Change req.\n",
|
|
|
+ pr_info(" setPowerMode::mode = %d, No Change req.\n",
|
|
|
mode);
|
|
|
return 0;
|
|
|
}
|
|
|
@@ -2459,7 +2459,7 @@ int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask)
|
|
|
u32 tmp = 0;
|
|
|
int status = 0;
|
|
|
|
|
|
- cx231xx_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask);
|
|
|
+ pr_info("cx231xx_start_stream():: ep_mask = %x\n", ep_mask);
|
|
|
status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET,
|
|
|
value, 4);
|
|
|
if (status < 0)
|
|
|
@@ -2484,7 +2484,7 @@ int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask)
|
|
|
u32 tmp = 0;
|
|
|
int status = 0;
|
|
|
|
|
|
- cx231xx_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask);
|
|
|
+ pr_info("cx231xx_stop_stream():: ep_mask = %x\n", ep_mask);
|
|
|
status =
|
|
|
cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4);
|
|
|
if (status < 0)
|
|
|
@@ -2512,32 +2512,32 @@ int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
|
|
|
if (dev->udev->speed == USB_SPEED_HIGH) {
|
|
|
switch (media_type) {
|
|
|
case Audio:
|
|
|
- cx231xx_info("%s: Audio enter HANC\n", __func__);
|
|
|
+ pr_info("%s: Audio enter HANC\n", __func__);
|
|
|
status =
|
|
|
cx231xx_mode_register(dev, TS_MODE_REG, 0x9300);
|
|
|
break;
|
|
|
|
|
|
case Vbi:
|
|
|
- cx231xx_info("%s: set vanc registers\n", __func__);
|
|
|
+ pr_info("%s: set vanc registers\n", __func__);
|
|
|
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300);
|
|
|
break;
|
|
|
|
|
|
case Sliced_cc:
|
|
|
- cx231xx_info("%s: set hanc registers\n", __func__);
|
|
|
+ pr_info("%s: set hanc registers\n", __func__);
|
|
|
status =
|
|
|
cx231xx_mode_register(dev, TS_MODE_REG, 0x1300);
|
|
|
break;
|
|
|
|
|
|
case Raw_Video:
|
|
|
- cx231xx_info("%s: set video registers\n", __func__);
|
|
|
+ pr_info("%s: set video registers\n", __func__);
|
|
|
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
|
|
|
break;
|
|
|
|
|
|
case TS1_serial_mode:
|
|
|
- cx231xx_info("%s: set ts1 registers", __func__);
|
|
|
+ pr_info("%s: set ts1 registers", __func__);
|
|
|
|
|
|
if (dev->board.has_417) {
|
|
|
- cx231xx_info(" MPEG\n");
|
|
|
+ pr_info(" MPEG\n");
|
|
|
value &= 0xFFFFFFFC;
|
|
|
value |= 0x3;
|
|
|
|
|
|
@@ -2558,14 +2558,14 @@ int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type)
|
|
|
TS1_LENGTH_REG, val, 4);
|
|
|
|
|
|
} else {
|
|
|
- cx231xx_info(" BDA\n");
|
|
|
+ pr_info(" BDA\n");
|
|
|
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101);
|
|
|
status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x010);
|
|
|
}
|
|
|
break;
|
|
|
|
|
|
case TS1_parallel_mode:
|
|
|
- cx231xx_info("%s: set ts1 parallel mode registers\n",
|
|
|
+ pr_info("%s: set ts1 parallel mode registers\n",
|
|
|
__func__);
|
|
|
status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100);
|
|
|
status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400);
|
|
|
@@ -2919,7 +2919,7 @@ int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev)
|
|
|
(nCnt > 0));
|
|
|
|
|
|
if (nCnt == 0)
|
|
|
- cx231xx_info("No ACK after %d msec -GPIO I2C failed!",
|
|
|
+ pr_info("No ACK after %d msec -GPIO I2C failed!",
|
|
|
nInit * 10);
|
|
|
|
|
|
/*
|