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@@ -310,7 +310,9 @@ void etm_config_trace_mode(struct etm_config *config)
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config->addr_type[1] = ETM_ADDR_TYPE_RANGE;
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}
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-#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | ETMCR_TIMESTAMP_EN)
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+#define ETM3X_SUPPORTED_OPTIONS (ETMCR_CYC_ACC | \
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+ ETMCR_TIMESTAMP_EN | \
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+ ETMCR_RETURN_STACK)
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static int etm_parse_event_config(struct etm_drvdata *drvdata,
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struct perf_event *event)
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@@ -341,14 +343,24 @@ static int etm_parse_event_config(struct etm_drvdata *drvdata,
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etm_config_trace_mode(config);
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/*
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- * At this time only cycle accurate and timestamp options are
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- * available.
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+ * At this time only cycle accurate, return stack and timestamp
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+ * options are available.
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*/
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if (attr->config & ~ETM3X_SUPPORTED_OPTIONS)
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return -EINVAL;
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config->ctrl = attr->config;
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+ /*
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+ * Possible to have cores with PTM (supports ret stack) and ETM
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+ * (never has ret stack) on the same SoC. So if we have a request
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+ * for return stack that can't be honoured on this core then
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+ * clear the bit - trace will still continue normally
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+ */
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+ if ((config->ctrl & ETMCR_RETURN_STACK) &&
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+ !(drvdata->etmccer & ETMCCER_RETSTACK))
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+ config->ctrl &= ~ETMCR_RETURN_STACK;
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+
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return 0;
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}
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