|
|
@@ -243,6 +243,38 @@ static void __init setup_processor(void)
|
|
|
block = (features >> 16) & 0xf;
|
|
|
if (block && !(block & 0x8))
|
|
|
elf_hwcap |= HWCAP_CRC32;
|
|
|
+
|
|
|
+#ifdef CONFIG_COMPAT
|
|
|
+ /*
|
|
|
+ * ID_ISAR5_EL1 carries similar information as above, but pertaining to
|
|
|
+ * the Aarch32 32-bit execution state.
|
|
|
+ */
|
|
|
+ features = read_cpuid(ID_ISAR5_EL1);
|
|
|
+ block = (features >> 4) & 0xf;
|
|
|
+ if (!(block & 0x8)) {
|
|
|
+ switch (block) {
|
|
|
+ default:
|
|
|
+ case 2:
|
|
|
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_PMULL;
|
|
|
+ case 1:
|
|
|
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_AES;
|
|
|
+ case 0:
|
|
|
+ break;
|
|
|
+ }
|
|
|
+ }
|
|
|
+
|
|
|
+ block = (features >> 8) & 0xf;
|
|
|
+ if (block && !(block & 0x8))
|
|
|
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA1;
|
|
|
+
|
|
|
+ block = (features >> 12) & 0xf;
|
|
|
+ if (block && !(block & 0x8))
|
|
|
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_SHA2;
|
|
|
+
|
|
|
+ block = (features >> 16) & 0xf;
|
|
|
+ if (block && !(block & 0x8))
|
|
|
+ compat_elf_hwcap2 |= COMPAT_HWCAP2_CRC32;
|
|
|
+#endif
|
|
|
}
|
|
|
|
|
|
static void __init setup_machine_fdt(phys_addr_t dt_phys)
|