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Merge tag 'mvebu-fixes-4.0-2' of git://git.infradead.org/linux-mvebu into next/dt

Pull "mvebu fix for 4.0" from Gregory CLEMENT:

use 0xf1000000 as internal registers on Armada 370 DB: needed for the
recent version of the board which no more comes with a bogus version of
the Armada 370 SoC.

* tag 'mvebu-fixes-4.0-2' of git://git.infradead.org/linux-mvebu:
  ARM: mvebu: use 0xf1000000 as internal registers on Armada 370 DB
  ARM: mvebu: Disable CPU Idle on Armada 38x
Arnd Bergmann 10 年之前
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49faf809ab
共有 2 個文件被更改,包括 25 次插入2 次删除
  1. 10 1
      arch/arm/boot/dts/armada-370-db.dts
  2. 15 1
      arch/arm/mach-mvebu/pmsu.c

+ 10 - 1
arch/arm/boot/dts/armada-370-db.dts

@@ -45,6 +45,15 @@
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
  *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Note: this Device Tree assumes that the bootloader has remapped the
+ * internal registers to 0xf1000000 (instead of the default
+ * 0xd0000000). The 0xf1000000 is the default used by the recent,
+ * DT-capable, U-Boot bootloaders provided by Marvell. Some earlier
+ * boards were delivered with an older version of the bootloader that
+ * left internal registers mapped at 0xd0000000. If you are in this
+ * situation, you should either update your bootloader (preferred
+ * solution) or the below Device Tree should be adjusted.
  */
  */
 
 
 /dts-v1/;
 /dts-v1/;
@@ -64,7 +73,7 @@
 	};
 	};
 
 
 	soc {
 	soc {
-		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000
+		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
 			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
 			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000>;
 
 
 		internal-regs {
 		internal-regs {

+ 15 - 1
arch/arm/mach-mvebu/pmsu.c

@@ -415,6 +415,9 @@ static __init int armada_38x_cpuidle_init(void)
 	void __iomem *mpsoc_base;
 	void __iomem *mpsoc_base;
 	u32 reg;
 	u32 reg;
 
 
+	pr_warn("CPU idle is currently broken on Armada 38x: disabling");
+	return 0;
+
 	np = of_find_compatible_node(NULL, NULL,
 	np = of_find_compatible_node(NULL, NULL,
 				     "marvell,armada-380-coherency-fabric");
 				     "marvell,armada-380-coherency-fabric");
 	if (!np)
 	if (!np)
@@ -476,6 +479,16 @@ static int __init mvebu_v7_cpu_pm_init(void)
 		return 0;
 		return 0;
 	of_node_put(np);
 	of_node_put(np);
 
 
+	/*
+	 * Currently the CPU idle support for Armada 38x is broken, as
+	 * the CPU hotplug uses some of the CPU idle functions it is
+	 * broken too, so let's disable it
+	 */
+	if (of_machine_is_compatible("marvell,armada380")) {
+		cpu_hotplug_disable();
+		pr_warn("CPU hotplug support is currently broken on Armada 38x: disabling");
+	}
+
 	if (of_machine_is_compatible("marvell,armadaxp"))
 	if (of_machine_is_compatible("marvell,armadaxp"))
 		ret = armada_xp_cpuidle_init();
 		ret = armada_xp_cpuidle_init();
 	else if (of_machine_is_compatible("marvell,armada370"))
 	else if (of_machine_is_compatible("marvell,armada370"))
@@ -489,7 +502,8 @@ static int __init mvebu_v7_cpu_pm_init(void)
 		return ret;
 		return ret;
 
 
 	mvebu_v7_pmsu_enable_l2_powerdown_onidle();
 	mvebu_v7_pmsu_enable_l2_powerdown_onidle();
-	platform_device_register(&mvebu_v7_cpuidle_device);
+	if (mvebu_v7_cpuidle_device.name)
+		platform_device_register(&mvebu_v7_cpuidle_device);
 	cpu_pm_register_notifier(&mvebu_v7_cpu_pm_notifier);
 	cpu_pm_register_notifier(&mvebu_v7_cpu_pm_notifier);
 
 
 	return 0;
 	return 0;