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@@ -696,15 +696,13 @@ static uint32_t ilk_get_aux_clock_divider(struct intel_dp *intel_dp, int index)
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{
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{
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struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
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struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
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struct drm_device *dev = intel_dig_port->base.base.dev;
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struct drm_device *dev = intel_dig_port->base.base.dev;
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+ struct drm_i915_private *dev_priv = dev->dev_private;
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if (index)
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if (index)
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return 0;
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return 0;
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if (intel_dig_port->port == PORT_A) {
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if (intel_dig_port->port == PORT_A) {
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- if (IS_GEN6(dev) || IS_GEN7(dev))
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- return 200; /* SNB & IVB eDP input clock at 400Mhz */
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- else
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- return 225; /* eDP input clock at 450Mhz */
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+ return DIV_ROUND_UP(dev_priv->display.get_display_clock_speed(dev), 2000);
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} else {
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} else {
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return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
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return DIV_ROUND_UP(intel_pch_rawclk(dev), 2);
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}
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}
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