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@@ -343,6 +343,22 @@ static void omap_clear_gpio_debounce(struct gpio_bank *bank, unsigned offset)
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}
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}
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}
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}
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+/*
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+ * Off mode wake-up capable GPIOs in bank(s) that are in the wakeup domain.
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+ * See TRM section for GPIO for "Wake-Up Generation" for the list of GPIOs
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+ * in wakeup domain. If bank->non_wakeup_gpios is not configured, assume none
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+ * are capable waking up the system from off mode.
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+ */
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+static bool omap_gpio_is_off_wakeup_capable(struct gpio_bank *bank, u32 gpio_mask)
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+{
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+ u32 no_wake = bank->non_wakeup_gpios;
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+
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+ if (no_wake)
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+ return !!(~no_wake & gpio_mask);
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+
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+ return false;
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+}
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+
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static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,
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static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,
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unsigned trigger)
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unsigned trigger)
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{
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{
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@@ -374,13 +390,7 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,
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}
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}
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/* This part needs to be executed always for OMAP{34xx, 44xx} */
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/* This part needs to be executed always for OMAP{34xx, 44xx} */
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- if (!bank->regs->irqctrl) {
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- /* On omap24xx proceed only when valid GPIO bit is set */
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- if (bank->non_wakeup_gpios) {
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- if (!(bank->non_wakeup_gpios & gpio_bit))
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- goto exit;
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- }
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-
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+ if (!bank->regs->irqctrl && !omap_gpio_is_off_wakeup_capable(bank, gpio)) {
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/*
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/*
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* Log the edge gpio and manually trigger the IRQ
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* Log the edge gpio and manually trigger the IRQ
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* after resume if the input level changes
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* after resume if the input level changes
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@@ -393,7 +403,6 @@ static inline void omap_set_gpio_trigger(struct gpio_bank *bank, int gpio,
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bank->enabled_non_wakeup_gpios &= ~gpio_bit;
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bank->enabled_non_wakeup_gpios &= ~gpio_bit;
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}
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}
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-exit:
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bank->level_mask =
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bank->level_mask =
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readl_relaxed(bank->base + bank->regs->leveldetect0) |
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readl_relaxed(bank->base + bank->regs->leveldetect0) |
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readl_relaxed(bank->base + bank->regs->leveldetect1);
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readl_relaxed(bank->base + bank->regs->leveldetect1);
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