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@@ -208,40 +208,41 @@
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#define INTEL_VLV_D_IDS(info) \
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#define INTEL_VLV_D_IDS(info) \
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INTEL_VGA_DEVICE(0x0155, info)
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INTEL_VGA_DEVICE(0x0155, info)
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-#define _INTEL_BDW_M(gt, id, info) \
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- INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
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-#define _INTEL_BDW_D(gt, id, info) \
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- INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
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-
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-#define _INTEL_BDW_M_IDS(gt, info) \
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- _INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \
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- _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \
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- _INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \
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- _INTEL_BDW_M(gt, 0x160E, info) /* ULX */
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-
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-#define _INTEL_BDW_D_IDS(gt, info) \
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- _INTEL_BDW_D(gt, 0x160A, info), /* Server */ \
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- _INTEL_BDW_D(gt, 0x160D, info) /* Workstation */
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-
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-#define INTEL_BDW_GT12M_IDS(info) \
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- _INTEL_BDW_M_IDS(1, info), \
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- _INTEL_BDW_M_IDS(2, info)
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+#define INTEL_BDW_GT12M_IDS(info) \
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+ INTEL_VGA_DEVICE(0x1602, info), /* GT1 ULT */ \
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+ INTEL_VGA_DEVICE(0x1606, info), /* GT1 ULT */ \
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+ INTEL_VGA_DEVICE(0x160B, info), /* GT1 Iris */ \
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+ INTEL_VGA_DEVICE(0x160E, info), /* GT1 ULX */ \
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+ INTEL_VGA_DEVICE(0x1612, info), /* GT2 Halo */ \
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+ INTEL_VGA_DEVICE(0x1616, info), /* GT2 ULT */ \
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+ INTEL_VGA_DEVICE(0x161B, info), /* GT2 ULT */ \
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+ INTEL_VGA_DEVICE(0x161E, info) /* GT2 ULX */
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#define INTEL_BDW_GT12D_IDS(info) \
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#define INTEL_BDW_GT12D_IDS(info) \
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- _INTEL_BDW_D_IDS(1, info), \
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- _INTEL_BDW_D_IDS(2, info)
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+ INTEL_VGA_DEVICE(0x160A, info), /* GT1 Server */ \
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+ INTEL_VGA_DEVICE(0x160D, info), /* GT1 Workstation */ \
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+ INTEL_VGA_DEVICE(0x161A, info), /* GT2 Server */ \
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+ INTEL_VGA_DEVICE(0x161D, info) /* GT2 Workstation */
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#define INTEL_BDW_GT3M_IDS(info) \
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#define INTEL_BDW_GT3M_IDS(info) \
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- _INTEL_BDW_M_IDS(3, info)
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+ INTEL_VGA_DEVICE(0x1622, info), /* ULT */ \
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+ INTEL_VGA_DEVICE(0x1626, info), /* ULT */ \
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+ INTEL_VGA_DEVICE(0x162B, info), /* Iris */ \
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+ INTEL_VGA_DEVICE(0x162E, info) /* ULX */
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#define INTEL_BDW_GT3D_IDS(info) \
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#define INTEL_BDW_GT3D_IDS(info) \
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- _INTEL_BDW_D_IDS(3, info)
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+ INTEL_VGA_DEVICE(0x162A, info), /* Server */ \
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+ INTEL_VGA_DEVICE(0x162D, info) /* Workstation */
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#define INTEL_BDW_RSVDM_IDS(info) \
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#define INTEL_BDW_RSVDM_IDS(info) \
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- _INTEL_BDW_M_IDS(4, info)
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+ INTEL_VGA_DEVICE(0x1632, info), /* ULT */ \
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+ INTEL_VGA_DEVICE(0x1636, info), /* ULT */ \
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+ INTEL_VGA_DEVICE(0x163B, info), /* Iris */ \
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+ INTEL_VGA_DEVICE(0x163E, info) /* ULX */
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#define INTEL_BDW_RSVDD_IDS(info) \
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#define INTEL_BDW_RSVDD_IDS(info) \
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- _INTEL_BDW_D_IDS(4, info)
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+ INTEL_VGA_DEVICE(0x163A, info), /* Server */ \
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+ INTEL_VGA_DEVICE(0x163D, info) /* Workstation */
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#define INTEL_BDW_M_IDS(info) \
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#define INTEL_BDW_M_IDS(info) \
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INTEL_BDW_GT12M_IDS(info), \
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INTEL_BDW_GT12M_IDS(info), \
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