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@@ -11320,6 +11320,39 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
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DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
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DRM_DEBUG_KMS("ips: %i\n", pipe_config->ips_enabled);
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DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
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DRM_DEBUG_KMS("double wide: %i\n", pipe_config->double_wide);
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+ if (IS_BROXTON(dev)) {
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+ DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: ebb0: 0x%x, "
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+ "pll0: 0x%x, pll1: 0x%x, pll2: 0x%x, pll3: 0x%x, "
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+ "pll6: 0x%x, pll8: 0x%x, pcsdw12: 0x%x\n",
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+ pipe_config->ddi_pll_sel,
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+ pipe_config->dpll_hw_state.ebb0,
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+ pipe_config->dpll_hw_state.pll0,
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+ pipe_config->dpll_hw_state.pll1,
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+ pipe_config->dpll_hw_state.pll2,
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+ pipe_config->dpll_hw_state.pll3,
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+ pipe_config->dpll_hw_state.pll6,
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+ pipe_config->dpll_hw_state.pll8,
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+ pipe_config->dpll_hw_state.pcsdw12);
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+ } else if (IS_SKYLAKE(dev)) {
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+ DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: "
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+ "ctrl1: 0x%x, cfgcr1: 0x%x, cfgcr2: 0x%x\n",
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+ pipe_config->ddi_pll_sel,
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+ pipe_config->dpll_hw_state.ctrl1,
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+ pipe_config->dpll_hw_state.cfgcr1,
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+ pipe_config->dpll_hw_state.cfgcr2);
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+ } else if (HAS_DDI(dev)) {
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+ DRM_DEBUG_KMS("ddi_pll_sel: %u; dpll_hw_state: wrpll: 0x%x\n",
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+ pipe_config->ddi_pll_sel,
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+ pipe_config->dpll_hw_state.wrpll);
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+ } else {
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+ DRM_DEBUG_KMS("dpll_hw_state: dpll: 0x%x, dpll_md: 0x%x, "
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+ "fp0: 0x%x, fp1: 0x%x\n",
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+ pipe_config->dpll_hw_state.dpll,
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+ pipe_config->dpll_hw_state.dpll_md,
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+ pipe_config->dpll_hw_state.fp0,
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+ pipe_config->dpll_hw_state.fp1);
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+ }
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+
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DRM_DEBUG_KMS("planes on this crtc\n");
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DRM_DEBUG_KMS("planes on this crtc\n");
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list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
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list_for_each_entry(plane, &dev->mode_config.plane_list, head) {
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intel_plane = to_intel_plane(plane);
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intel_plane = to_intel_plane(plane);
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