Jelajahi Sumber

drm/amdkfd: Add AQL Queue Memory flag on topology

This is needed for enabling a user-mode workaround for an AQL queue
wrapping HW bug on Tonga.

Signed-off-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Acked-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
Ben Goz 8 tahun lalu
induk
melakukan
413e85d5d3

+ 4 - 0
drivers/gpu/drm/amd/amdkfd/kfd_topology.c

@@ -455,6 +455,10 @@ static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
 				HSA_CAP_WATCH_POINTS_TOTALBITS_MASK);
 				HSA_CAP_WATCH_POINTS_TOTALBITS_MASK);
 		}
 		}
 
 
+		if (dev->gpu->device_info->asic_family == CHIP_TONGA)
+			dev->node_props.capability |=
+					HSA_CAP_AQL_QUEUE_DOUBLE_MAP;
+
 		sysfs_show_32bit_prop(buffer, "max_engine_clk_fcompute",
 		sysfs_show_32bit_prop(buffer, "max_engine_clk_fcompute",
 			dev->node_props.max_engine_clk_fcompute);
 			dev->node_props.max_engine_clk_fcompute);
 
 

+ 1 - 0
drivers/gpu/drm/amd/amdkfd/kfd_topology.h

@@ -45,6 +45,7 @@
 
 
 #define HSA_CAP_DOORBELL_TYPE_PRE_1_0		0x0
 #define HSA_CAP_DOORBELL_TYPE_PRE_1_0		0x0
 #define HSA_CAP_DOORBELL_TYPE_1_0		0x1
 #define HSA_CAP_DOORBELL_TYPE_1_0		0x1
+#define HSA_CAP_AQL_QUEUE_DOUBLE_MAP		0x00004000
 
 
 struct kfd_node_properties {
 struct kfd_node_properties {
 	uint32_t cpu_cores_count;
 	uint32_t cpu_cores_count;