TEMP: dt-bindings: soc: ti: pruss: Add IEP and CORE clock mux

ICSS/ICSSG modules have an IEP clock mux that allow selection
of internal IEP clock from 2 clock sources.

ICSSG module has a CORE clock mux that allows selection
of internal CORE clock from 2 clock sources.

Add binding information for these 2 clock muxes.

Signed-off-by: Roger Quadros <rogerq@ti.com>
[s-anna@ti.com: few minor fixups]
Signed-off-by: Suman Anna <s-anna@ti.com>

Documentation/devicetree/bindings/soc/ti/ti,pruss.txt

@@ -139,6 +139,30 @@ See Documentation/devicetree/bindings/mfd/syscon.txt for generic syscon
 binding details.
 
 
+IEPCLK MUX Clock node
+=====================
+The IEP module can get its clock from 2 sources i.e. IEP_CLK input to
+the PRU-ICSS module or the Bus clock (ICLK). This node models this clock
+mux and should have the name "iepclk_mux".
+
+Required Properties:
+--------------------
+-#clock-cells   : should be 0
+-clocks         : phandles to the 2 input clocks to the IEPCLK MUX.
+
+CORECLK MUX Clock node
+======================
+This is applicable only for ICSSG (K3 SoCs). The ICSSG modules core clock
+can be set to one of the 2 sources i.e. CORE_CLK input to the ICSSG module
+or VBUS clock. This node models this clock mux and should have the name
+"coreclk_mux".
+
+Required Properties:
+--------------------
+-#clock-cells   : should be 0
+-clocks         : phandles to the 2 input clocks to the CORECLK MUX.
+
+
 PRUSS INTC Node
 ================
 Each PRUSS has a single interrupt controller instance that is common to both