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of: Document long-ram-code property in nvidia,tegra20-apbmisc

Needed to properly decode the RAM code register.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tomeu Vizoso 10 năm trước cách đây
mục cha
commit
405990c7e8

+ 2 - 0
Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt

@@ -10,3 +10,5 @@ Required properties:
        The second entry gives the physical address and length of the
        The second entry gives the physical address and length of the
        registers indicating the strapping options.
        registers indicating the strapping options.
 
 
+Optional properties:
+- nvidia,long-ram-code: If present, the RAM code is long (4 bit). If not, short (2 bit).