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@@ -189,7 +189,6 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
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unsigned int ep;
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unsigned int addr;
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int timeout;
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- u32 dptxfsizn;
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u32 val;
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/* Reset fifo map if not correctly cleared during previous session */
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@@ -218,13 +217,13 @@ static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg)
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* given endpoint.
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*/
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for (ep = 1; ep < MAX_EPS_CHANNELS; ep++) {
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- dptxfsizn = dwc2_readl(hsotg->regs + DPTXFSIZN(ep));
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-
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- val = (dptxfsizn & FIFOSIZE_DEPTH_MASK) | addr;
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- addr += dptxfsizn >> FIFOSIZE_DEPTH_SHIFT;
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-
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- if (addr > hsotg->fifo_mem)
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- break;
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+ if (!hsotg->g_tx_fifo_sz[ep])
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+ continue;
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+ val = addr;
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+ val |= hsotg->g_tx_fifo_sz[ep] << FIFOSIZE_DEPTH_SHIFT;
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+ WARN_ONCE(addr + hsotg->g_tx_fifo_sz[ep] > hsotg->fifo_mem,
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+ "insufficient fifo memory");
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+ addr += hsotg->g_tx_fifo_sz[ep];
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dwc2_writel(val, hsotg->regs + DPTXFSIZN(ep));
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}
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@@ -3807,10 +3806,36 @@ static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg)
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static void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg)
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{
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struct device_node *np = hsotg->dev->of_node;
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+ u32 len = 0;
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+ u32 i = 0;
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/* Enable dma if requested in device tree */
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hsotg->g_using_dma = of_property_read_bool(np, "g-use-dma");
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+ /*
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+ * Register TX periodic fifo size per endpoint.
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+ * EP0 is excluded since it has no fifo configuration.
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+ */
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+ if (!of_find_property(np, "g-tx-fifo-size", &len))
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+ goto rx_fifo;
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+
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+ len /= sizeof(u32);
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+
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+ /* Read tx fifo sizes other than ep0 */
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+ if (of_property_read_u32_array(np, "g-tx-fifo-size",
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+ &hsotg->g_tx_fifo_sz[1], len))
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+ goto rx_fifo;
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+
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+ /* Add ep0 */
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+ len++;
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+
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+ /* Make remaining TX fifos unavailable */
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+ if (len < MAX_EPS_CHANNELS) {
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+ for (i = len; i < MAX_EPS_CHANNELS; i++)
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+ hsotg->g_tx_fifo_sz[i] = 0;
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+ }
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+
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+rx_fifo:
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/* Register RX fifo size */
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of_property_read_u32(np, "g-rx-fifo-size", &hsotg->g_rx_fifo_sz);
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@@ -3832,10 +3857,13 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
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struct device *dev = hsotg->dev;
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int epnum;
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int ret;
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+ int i;
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+ u32 p_tx_fifo[] = DWC2_G_P_LEGACY_TX_FIFO_SIZE;
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/* Initialize to legacy fifo configuration values */
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hsotg->g_rx_fifo_sz = 2048;
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hsotg->g_np_g_tx_fifo_sz = 1024;
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+ memcpy(&hsotg->g_tx_fifo_sz[1], p_tx_fifo, sizeof(p_tx_fifo));
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/* Device tree specific probe */
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dwc2_hsotg_of_probe(hsotg);
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@@ -3853,6 +3881,9 @@ int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq)
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dev_dbg(dev, "NonPeriodic TXFIFO size: %d\n",
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hsotg->g_np_g_tx_fifo_sz);
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dev_dbg(dev, "RXFIFO size: %d\n", hsotg->g_rx_fifo_sz);
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+ for (i = 0; i < MAX_EPS_CHANNELS; i++)
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+ dev_dbg(dev, "Periodic TXFIFO%2d size: %d\n", i,
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+ hsotg->g_tx_fifo_sz[i]);
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hsotg->gadget.max_speed = USB_SPEED_HIGH;
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hsotg->gadget.ops = &dwc2_hsotg_gadget_ops;
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