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@@ -422,7 +422,6 @@ static int dwc3_core_init(struct dwc3 *dwc)
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reg = dwc3_readl(dwc->regs, DWC3_GCTL);
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reg &= ~DWC3_GCTL_SCALEDOWN_MASK;
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- reg &= ~DWC3_GCTL_DISSCRAMBLE;
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switch (DWC3_GHWPARAMS1_EN_PWROPT(dwc->hwparams.hwparams1)) {
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case DWC3_GHWPARAMS1_EN_PWROPT_CLK:
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@@ -466,6 +465,14 @@ static int dwc3_core_init(struct dwc3 *dwc)
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dwc->is_fpga = true;
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}
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+ WARN_ONCE(dwc->disable_scramble_quirk && !dwc->is_fpga,
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+ "disable_scramble cannot be used on non-FPGA builds\n");
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+
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+ if (dwc->disable_scramble_quirk && dwc->is_fpga)
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+ reg |= DWC3_GCTL_DISSCRAMBLE;
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+ else
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+ reg &= ~DWC3_GCTL_DISSCRAMBLE;
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+
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/*
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* WORKAROUND: DWC3 revisions <1.90a have a bug
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* where the device can fail to connect at SuperSpeed
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@@ -710,11 +717,16 @@ static int dwc3_probe(struct platform_device *pdev)
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dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
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dwc->dr_mode = of_usb_get_dr_mode(node);
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+
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+ dwc->disable_scramble_quirk = of_property_read_bool(node,
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+ "snps,disable_scramble_quirk");
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} else if (pdata) {
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dwc->maximum_speed = pdata->maximum_speed;
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dwc->needs_fifo_resize = pdata->tx_fifo_resize;
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dwc->dr_mode = pdata->dr_mode;
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+
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+ dwc->disable_scramble_quirk = pdata->disable_scramble_quirk;
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}
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/* default to superspeed if no maximum_speed passed */
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