arm64: dts: ti: k3-j721e-main.dtsi: Add dma-coherent to smmu0

When emulating stage 1 translations in Jailhouse, sometimes an update to
the command queue is not visible to the hypervisor, causing the command
previously in the slot to be issued. Adding dma-coherent fixes that.

Signed-off-by: Pratyush Yadav <p-yadav1@ti.com>

arch/arm64/boot/dts/ti/k3-j721e-main.dtsi

@@ -97,6 +97,7 @@
 			     <GIC_SPI 768 IRQ_TYPE_EDGE_RISING>;
 		interrupt-names = "eventq", "gerror";
 		#iommu-cells = <1>;
+		dma-coherent;
 	};
 
 	main_gpio_intr: interrupt-controller0 {