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@@ -89,6 +89,7 @@ enum DPM_EVENT_SRC {
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DPM_EVENT_SRC_DIGITAL_OR_EXTERNAL = 4
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};
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+static int smu7_avfs_control(struct pp_hwmgr *hwmgr, bool enable);
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static const unsigned long PhwVIslands_Magic = (unsigned long)(PHM_VIslands_Magic);
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static int smu7_force_clock_level(struct pp_hwmgr *hwmgr,
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enum pp_clock_type type, uint32_t mask);
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@@ -1309,11 +1310,9 @@ int smu7_disable_dpm_tasks(struct pp_hwmgr *hwmgr)
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PP_ASSERT_WITH_CODE((tmp_result == 0),
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"Failed to disable thermal auto throttle!", result = tmp_result);
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- if (1 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, FEATURE_STATUS, AVS_ON)) {
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- PP_ASSERT_WITH_CODE((0 == smum_send_msg_to_smc(hwmgr->smumgr, PPSMC_MSG_DisableAvfs)),
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- "Failed to disable AVFS!",
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- return -EINVAL);
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- }
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+ tmp_result = smu7_avfs_control(hwmgr, false);
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+ PP_ASSERT_WITH_CODE((tmp_result == 0),
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+ "Failed to disable AVFS!", result = tmp_result);
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tmp_result = smu7_stop_dpm(hwmgr);
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PP_ASSERT_WITH_CODE((tmp_result == 0),
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