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@@ -45,6 +45,61 @@
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};
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};
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};
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};
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+ etf@10003000 {
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+ compatible = "arm,coresight-tmc", "arm,primecell";
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+ reg = <0 0x10003000 0 0x1000>;
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+ clocks = <&clk26mhz>;
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+ clock-names = "apb_pclk";
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+ port {
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+ etf_in: endpoint {
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+ slave-mode;
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+ remote-endpoint = <&funnel_out_port0>;
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+ };
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+ };
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+ };
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+
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+ funnel@10001000 {
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+ compatible = "arm,coresight-funnel", "arm,primecell";
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+ reg = <0 0x10001000 0 0x1000>;
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+ clocks = <&clk26mhz>;
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+ clock-names = "apb_pclk";
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+ ports {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ /* funnel output port */
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+ port@0 {
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+ reg = <0>;
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+ funnel_out_port0: endpoint {
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+ remote-endpoint = <&etf_in>;
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+ };
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+ };
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+
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+ /* funnel input port 0~3 is reserved for ETMs */
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+ port@1 {
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+ reg = <4>;
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+ funnel_in_port4: endpoint {
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+ slave-mode;
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+ remote-endpoint = <&stm_out>;
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+ };
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+ };
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+ };
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+ };
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+
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+ stm@10006000 {
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+ compatible = "arm,coresight-stm", "arm,primecell";
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+ reg = <0 0x10006000 0 0x1000>,
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+ <0 0x01000000 0 0x180000>;
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+ reg-names = "stm-base", "stm-stimulus-base";
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+ clocks = <&clk26mhz>;
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+ clock-names = "apb_pclk";
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+ port {
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+ stm_out: endpoint {
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+ remote-endpoint = <&funnel_in_port4>;
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+ };
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+ };
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+ };
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+
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gic: interrupt-controller@12001000 {
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gic: interrupt-controller@12001000 {
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compatible = "arm,gic-400";
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compatible = "arm,gic-400";
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reg = <0 0x12001000 0 0x1000>,
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reg = <0 0x12001000 0 0x1000>,
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