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@@ -569,15 +569,25 @@ static irqreturn_t amd_gpio_irq_handler(int irq, void *dev_id)
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!(regval & BIT(INTERRUPT_MASK_OFF)))
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continue;
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irq = irq_find_mapping(gc->irq.domain, irqnr + i);
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- generic_handle_irq(irq);
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+ if (irq != 0)
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+ generic_handle_irq(irq);
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/* Clear interrupt.
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* We must read the pin register again, in case the
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* value was changed while executing
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* generic_handle_irq() above.
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+ * If we didn't find a mapping for the interrupt,
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+ * disable it in order to avoid a system hang caused
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+ * by an interrupt storm.
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*/
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raw_spin_lock_irqsave(&gpio_dev->lock, flags);
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regval = readl(regs + i);
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+ if (irq == 0) {
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+ regval &= ~BIT(INTERRUPT_ENABLE_OFF);
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+ dev_dbg(&gpio_dev->pdev->dev,
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+ "Disabling spurious GPIO IRQ %d\n",
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+ irqnr + i);
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+ }
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writel(regval, regs + i);
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raw_spin_unlock_irqrestore(&gpio_dev->lock, flags);
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ret = IRQ_HANDLED;
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