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@@ -97,3 +97,96 @@ const struct decode_checker arm_stack_checker[NUM_PROBES_ARM_ACTIONS] = {
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[PROBES_STORE] = {.checker = arm_check_stack},
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[PROBES_LDMSTM] = {.checker = arm_check_stack},
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};
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+
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+static enum probes_insn __kprobes arm_check_regs_nouse(probes_opcode_t insn,
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+ struct arch_probes_insn *asi,
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+ const struct decode_header *h)
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+{
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+ asi->register_usage_flags = 0;
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+ return INSN_GOOD;
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+}
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+
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+static enum probes_insn arm_check_regs_normal(probes_opcode_t insn,
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+ struct arch_probes_insn *asi,
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+ const struct decode_header *h)
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+{
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+ u32 regs = h->type_regs.bits >> DECODE_TYPE_BITS;
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+ int i;
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+
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+ asi->register_usage_flags = 0;
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+ for (i = 0; i < 5; regs >>= 4, insn >>= 4, i++)
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+ if (regs & 0xf)
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+ asi->register_usage_flags |= 1 << (insn & 0xf);
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+
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+ return INSN_GOOD;
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+}
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+
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+
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+static enum probes_insn arm_check_regs_ldmstm(probes_opcode_t insn,
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+ struct arch_probes_insn *asi,
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+ const struct decode_header *h)
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+{
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+ unsigned int reglist = insn & 0xffff;
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+ unsigned int rn = (insn >> 16) & 0xf;
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+ asi->register_usage_flags = reglist | (1 << rn);
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+ return INSN_GOOD;
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+}
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+
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+static enum probes_insn arm_check_regs_mov_ip_sp(probes_opcode_t insn,
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+ struct arch_probes_insn *asi,
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+ const struct decode_header *h)
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+{
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+ /* Instruction is 'mov ip, sp' i.e. 'mov r12, r13' */
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+ asi->register_usage_flags = (1 << 12) | (1<< 13);
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+ return INSN_GOOD;
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+}
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+
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+/*
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+ * | Rn |Rt/d| | Rm |
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+ * LDRD (register) cccc 000x x0x0 xxxx xxxx xxxx 1101 xxxx
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+ * STRD (register) cccc 000x x0x0 xxxx xxxx xxxx 1111 xxxx
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+ * | Rn |Rt/d| |imm4L|
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+ * LDRD (immediate) cccc 000x x1x0 xxxx xxxx xxxx 1101 xxxx
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+ * STRD (immediate) cccc 000x x1x0 xxxx xxxx xxxx 1111 xxxx
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+ *
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+ * Such instructions access Rt/d and its next register, so different
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+ * from others, a specific checker is required to handle this extra
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+ * implicit register usage.
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+ */
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+static enum probes_insn arm_check_regs_ldrdstrd(probes_opcode_t insn,
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+ struct arch_probes_insn *asi,
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+ const struct decode_header *h)
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+{
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+ int rdt = (insn >> 12) & 0xf;
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+ arm_check_regs_normal(insn, asi, h);
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+ asi->register_usage_flags |= 1 << (rdt + 1);
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+ return INSN_GOOD;
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+}
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+
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+
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+const struct decode_checker arm_regs_checker[NUM_PROBES_ARM_ACTIONS] = {
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+ [PROBES_MRS] = {.checker = arm_check_regs_normal},
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+ [PROBES_SATURATING_ARITHMETIC] = {.checker = arm_check_regs_normal},
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+ [PROBES_MUL1] = {.checker = arm_check_regs_normal},
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+ [PROBES_MUL2] = {.checker = arm_check_regs_normal},
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+ [PROBES_MUL_ADD_LONG] = {.checker = arm_check_regs_normal},
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+ [PROBES_MUL_ADD] = {.checker = arm_check_regs_normal},
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+ [PROBES_LOAD] = {.checker = arm_check_regs_normal},
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+ [PROBES_LOAD_EXTRA] = {.checker = arm_check_regs_normal},
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+ [PROBES_STORE] = {.checker = arm_check_regs_normal},
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+ [PROBES_STORE_EXTRA] = {.checker = arm_check_regs_normal},
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+ [PROBES_DATA_PROCESSING_REG] = {.checker = arm_check_regs_normal},
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+ [PROBES_DATA_PROCESSING_IMM] = {.checker = arm_check_regs_normal},
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+ [PROBES_SEV] = {.checker = arm_check_regs_nouse},
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+ [PROBES_WFE] = {.checker = arm_check_regs_nouse},
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+ [PROBES_SATURATE] = {.checker = arm_check_regs_normal},
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+ [PROBES_REV] = {.checker = arm_check_regs_normal},
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+ [PROBES_MMI] = {.checker = arm_check_regs_normal},
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+ [PROBES_PACK] = {.checker = arm_check_regs_normal},
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+ [PROBES_EXTEND] = {.checker = arm_check_regs_normal},
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+ [PROBES_EXTEND_ADD] = {.checker = arm_check_regs_normal},
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+ [PROBES_BITFIELD] = {.checker = arm_check_regs_normal},
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+ [PROBES_LDMSTM] = {.checker = arm_check_regs_ldmstm},
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+ [PROBES_MOV_IP_SP] = {.checker = arm_check_regs_mov_ip_sp},
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+ [PROBES_LDRSTRD] = {.checker = arm_check_regs_ldrdstrd},
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+};
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