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@@ -187,7 +187,7 @@ static inline int mipsr6_emul(struct pt_regs *regs, u32 ir)
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}
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/**
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- * movt_func - Emulate a MOVT instruction
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+ * movf_func - Emulate a MOVF instruction
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* @regs: Process register set
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* @ir: Instruction
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*
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@@ -200,9 +200,12 @@ static int movf_func(struct pt_regs *regs, u32 ir)
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csr = current->thread.fpu.fcr31;
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cond = fpucondbit[MIPSInst_RT(ir) >> 2];
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+
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if (((csr & cond) == 0) && MIPSInst_RD(ir))
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regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
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+
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MIPS_R2_STATS(movs);
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+
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return 0;
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}
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