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@@ -7,7 +7,7 @@
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*
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* Authors: Pawel Jez <pjez@cadence.com>,
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* Pawel Laszczak <pawell@cadence.com>
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- * Peter Chen <peter.chen@nxp.com>
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+ * Peter Chen <peter.chen@nxp.com>
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*/
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/*
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@@ -26,7 +26,7 @@
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* as valid during adding next TRB only if DMA is stopped or at TRBERR
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* interrupt.
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*
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- * Issue has been fixed for DEV_VER_V2 version of controller.
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+ * Issue has been fixed in DEV_VER_V3 version of controller.
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*
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* Work around 2:
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* Controller for OUT endpoints has shared on-chip buffers for all incoming
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@@ -52,19 +52,20 @@
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* It's cause that buffer placed in on chip memory block transfer to other
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* endpoints.
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*
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- * Issue has been fixed for DEV_VER_V2 version of controller.
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+ * Issue has been fixed in DEV_VER_V2 version of controller.
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*
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*/
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#include <linux/dma-mapping.h>
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#include <linux/usb/gadget.h>
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#include <linux/module.h>
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+#include <linux/iopoll.h>
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#include "core.h"
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-#include "drd.h"
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#include "gadget-export.h"
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#include "gadget.h"
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#include "trace.h"
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+#include "drd.h"
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static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
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struct usb_request *request,
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@@ -92,6 +93,16 @@ u8 cdns3_ep_addr_to_index(u8 ep_addr)
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return (((ep_addr & 0x7F)) + ((ep_addr & USB_DIR_IN) ? 16 : 0));
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}
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+static int cdns3_get_dma_pos(struct cdns3_device *priv_dev,
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+ struct cdns3_endpoint *priv_ep)
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+{
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+ int dma_index;
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+
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+ dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
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+
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+ return dma_index / TRB_SIZE;
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+}
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+
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/**
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* cdns3_next_request - returns next request from list
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* @list: list containing requests
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@@ -172,10 +183,10 @@ int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
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struct cdns3_trb *link_trb;
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if (!priv_ep->trb_pool) {
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- priv_ep->trb_pool = dma_zalloc_coherent(priv_dev->sysdev,
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- ring_size,
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- &priv_ep->trb_pool_dma,
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- GFP_DMA);
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+ priv_ep->trb_pool = dma_alloc_coherent(priv_dev->sysdev,
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+ ring_size,
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+ &priv_ep->trb_pool_dma,
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+ GFP_DMA32 | GFP_ATOMIC);
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if (!priv_ep->trb_pool)
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return -ENOMEM;
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} else {
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@@ -186,11 +197,10 @@ int cdns3_allocate_trb_pool(struct cdns3_endpoint *priv_ep)
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return 0;
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priv_ep->num_trbs = ring_size / TRB_SIZE;
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- /* Initialize the last TRB as Link TRB */
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+ /* Initialize the last TRB as Link TRB. */
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link_trb = (priv_ep->trb_pool + (priv_ep->num_trbs - 1));
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link_trb->buffer = TRB_BUFFER(priv_ep->trb_pool_dma);
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- link_trb->control = TRB_CYCLE | TRB_TYPE(TRB_LINK) |
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- TRB_CHAIN | TRB_TOGGLE;
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+ link_trb->control = TRB_CYCLE | TRB_TYPE(TRB_LINK) | TRB_TOGGLE;
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return 0;
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}
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@@ -216,16 +226,18 @@ static void cdns3_free_trb_pool(struct cdns3_endpoint *priv_ep)
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static void cdns3_ep_stall_flush(struct cdns3_endpoint *priv_ep)
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{
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struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
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+ int val;
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- cdns3_dbg(priv_ep->cdns3_dev, "Stall & flush endpoint %s\n",
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- priv_ep->name);
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+ trace_cdns3_halt(priv_ep, 1, 1);
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writel(EP_CMD_DFLUSH | EP_CMD_ERDY | EP_CMD_SSTALL,
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&priv_dev->regs->ep_cmd);
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/* wait for DFLUSH cleared */
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- cdns3_handshake(&priv_dev->regs->ep_cmd, EP_CMD_DFLUSH, 0, 1000);
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- priv_ep->flags |= EP_STALL;
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+ readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
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+ !(val & EP_CMD_DFLUSH), 1, 1000);
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+ priv_ep->flags |= EP_STALLED;
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+ priv_ep->flags &= ~EP_STALL_PENDING;
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}
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/**
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@@ -238,8 +250,9 @@ void cdns3_hw_reset_eps_config(struct cdns3_device *priv_dev)
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cdns3_allow_enable_l1(priv_dev, 0);
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priv_dev->hw_configured_flag = 0;
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- priv_dev->onchip_mem_allocated_size = 0;
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+ priv_dev->onchip_used_size = 0;
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priv_dev->out_mem_is_allocated = 0;
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+ priv_dev->wait_for_setup = 0;
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}
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/**
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@@ -401,6 +414,8 @@ static void cdns3_wa2_descmiss_copy_data(struct cdns3_endpoint *priv_ep,
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chunk_end = descmiss_priv_req->flags & REQUEST_INTERNAL_CH;
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length = request->actual + descmiss_req->actual;
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+ request->status = descmiss_req->status;
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+
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if (length <= request->length) {
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memcpy(&((u8 *)request->buf)[request->actual],
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descmiss_req->buf,
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@@ -473,6 +488,7 @@ int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
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priv_ep->flags &= ~EP_QUIRK_EXTRA_BUF_DET;
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reg = readl(&priv_dev->regs->ep_sts_en);
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reg &= ~EP_STS_EN_DESCMISEN;
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+ trace_cdns3_wa2(priv_ep, "workaround disabled\n");
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writel(reg, &priv_dev->regs->ep_sts_en);
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}
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@@ -489,19 +505,30 @@ int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
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!(priv_req->flags & REQUEST_INTERNAL)) {
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cdns3_wa2_descmiss_copy_data(priv_ep,
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&priv_req->request);
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+
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+ trace_cdns3_wa2(priv_ep, "get internal stored data");
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+
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list_add_tail(&priv_req->request.list,
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&priv_ep->pending_req_list);
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cdns3_gadget_giveback(priv_ep, priv_req,
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priv_req->request.status);
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- return deferred;
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+
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+ /*
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+ * Intentionally driver returns positive value as
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+ * correct value. It informs that transfer has
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+ * been finished.
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+ */
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+ return EINPROGRESS;
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}
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/*
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* Driver will wait for completion DESCMISS transfer,
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* before starts new, not DESCMISS transfer.
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*/
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- if (!pending_empty && !descmiss_empty)
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+ if (!pending_empty && !descmiss_empty) {
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+ trace_cdns3_wa2(priv_ep, "wait for pending transfer\n");
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deferred = 1;
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+ }
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if (priv_req->flags & REQUEST_INTERNAL)
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list_add_tail(&priv_req->list,
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@@ -511,7 +538,7 @@ int cdns3_wa2_gadget_ep_queue(struct cdns3_device *priv_dev,
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return deferred;
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}
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-static void cdsn3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
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+static void cdns3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
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{
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struct cdns3_request *priv_req;
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@@ -521,6 +548,8 @@ static void cdsn3_wa2_remove_old_request(struct cdns3_endpoint *priv_ep)
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priv_req = cdns3_next_priv_request(&priv_ep->wa2_descmiss_req_list);
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chain = !!(priv_req->flags & REQUEST_INTERNAL_CH);
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+ trace_cdns3_wa2(priv_ep, "removes eldest request");
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+
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kfree(priv_req->request.buf);
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cdns3_gadget_ep_free_request(&priv_ep->endpoint,
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&priv_req->request);
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@@ -549,10 +578,10 @@ static void cdns3_wa2_descmissing_packet(struct cdns3_endpoint *priv_ep)
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priv_ep->flags |= EP_QUIRK_EXTRA_BUF_EN;
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}
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- cdns3_dbg(priv_ep->cdns3_dev, "WA2: Description Missing detected\n");
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+ trace_cdns3_wa2(priv_ep, "Description Missing detected\n");
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if (priv_ep->wa2_counter >= CDNS3_WA2_NUM_BUFFERS)
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- cdsn3_wa2_remove_old_request(priv_ep);
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+ cdns3_wa2_remove_old_request(priv_ep);
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request = cdns3_gadget_ep_alloc_request(&priv_ep->endpoint,
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GFP_ATOMIC);
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@@ -634,10 +663,6 @@ void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
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return;
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}
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- /* Start all not pending request */
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- if (priv_ep->flags & EP_RING_FULL)
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- cdns3_start_all_request(priv_dev, priv_ep);
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-
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if (request->complete) {
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spin_unlock(&priv_dev->lock);
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usb_gadget_giveback_request(&priv_ep->endpoint,
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@@ -651,11 +676,10 @@ void cdns3_gadget_giveback(struct cdns3_endpoint *priv_ep,
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void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
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{
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- struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
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-
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/* Work around for stale data address in TRB*/
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if (priv_ep->wa1_set) {
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- cdns3_dbg(priv_dev, "WA1: update cycle bit\n");
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+ trace_cdns3_wa1(priv_ep, "restore cycle bit");
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+
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priv_ep->wa1_set = 0;
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priv_ep->wa1_trb_index = 0xFFFF;
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if (priv_ep->wa1_cycle_bit) {
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@@ -668,6 +692,35 @@ void cdns3_wa1_restore_cycle_bit(struct cdns3_endpoint *priv_ep)
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}
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}
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+static void cdns3_free_aligned_request_buf(struct work_struct *work)
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+{
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+ struct cdns3_device *priv_dev = container_of(work, struct cdns3_device,
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+ aligned_buf_wq);
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+ struct cdns3_aligned_buf *buf, *tmp;
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+ unsigned long flags;
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+
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+ spin_lock_irqsave(&priv_dev->lock, flags);
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+
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+ list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list, list) {
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+ if (!buf->in_use) {
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+ list_del(&buf->list);
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+
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+ /*
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+ * Re-enable interrupts to free DMA capable memory.
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+ * Driver can't free this memory with disabled
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+ * interrupts.
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+ */
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+ spin_unlock_irqrestore(&priv_dev->lock, flags);
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+ dma_free_coherent(priv_dev->sysdev, buf->size,
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+ buf->buf, buf->dma);
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+ kfree(buf);
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+ spin_lock_irqsave(&priv_dev->lock, flags);
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+ }
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+ }
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+
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+ spin_unlock_irqrestore(&priv_dev->lock, flags);
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+}
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+
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static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
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{
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struct cdns3_endpoint *priv_ep = priv_req->priv_ep;
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@@ -699,7 +752,8 @@ static int cdns3_prepare_aligned_request_buf(struct cdns3_request *priv_req)
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if (priv_req->aligned_buf) {
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trace_cdns3_free_aligned_request(priv_req);
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priv_req->aligned_buf->in_use = 0;
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- priv_dev->run_garbage_colector = 1;
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+ queue_work(system_freezable_wq,
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+ &priv_dev->aligned_buf_wq);
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}
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buf->in_use = 1;
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@@ -735,7 +789,7 @@ static int cdns3_wa1_update_guard(struct cdns3_endpoint *priv_ep,
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priv_ep->wa1_set = 1;
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priv_ep->wa1_trb = trb;
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priv_ep->wa1_trb_index = priv_ep->enqueue;
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- cdns3_dbg(priv_dev, "WA1 set guard\n");
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+ trace_cdns3_wa1(priv_ep, "set guard");
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return 0;
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}
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}
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@@ -749,8 +803,7 @@ static void cdns3_wa1_tray_restore_cycle_bit(struct cdns3_device *priv_dev,
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u32 doorbell;
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doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
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- dma_index = readl(&priv_dev->regs->ep_traddr) - priv_ep->trb_pool_dma;
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- dma_index /= TRB_SIZE;
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+ dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
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if (!doorbell || dma_index != priv_ep->wa1_trb_index)
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cdns3_wa1_restore_cycle_bit(priv_ep);
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@@ -769,7 +822,6 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
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struct cdns3_request *priv_req;
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struct cdns3_trb *trb;
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dma_addr_t trb_dma;
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- int prev_enqueue;
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u32 togle_pcs = 1;
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int sg_iter = 0;
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int num_trb;
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@@ -801,29 +853,51 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
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trb = priv_ep->trb_pool + priv_ep->enqueue;
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priv_req->start_trb = priv_ep->enqueue;
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priv_req->trb = trb;
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- prev_enqueue = priv_ep->enqueue;
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+
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+ cdns3_select_ep(priv_ep->cdns3_dev, address);
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/* prepare ring */
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if ((priv_ep->enqueue + num_trb) >= (priv_ep->num_trbs - 1)) {
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+ struct cdns3_trb *link_trb;
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+ int doorbell, dma_index;
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+ u32 ch_bit = 0;
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+
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+ doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
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+ dma_index = cdns3_get_dma_pos(priv_dev, priv_ep);
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+
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+ /* Driver can't update LINK TRB if it is current processed. */
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+ if (doorbell && dma_index == priv_ep->num_trbs - 1) {
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+ priv_ep->flags |= EP_DEFERRED_DRDY;
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+ return -ENOBUFS;
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+ }
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+
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/*updating C bt in Link TRB before starting DMA*/
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- struct cdns3_trb *link_trb = priv_ep->trb_pool +
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- (priv_ep->num_trbs - 1);
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+ link_trb = priv_ep->trb_pool + (priv_ep->num_trbs - 1);
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+ /*
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+ * For TRs size equal 2 enabling TRB_CHAIN for epXin causes
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+ * that DMA stuck at the LINK TRB.
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+ * On the other hand, removing TRB_CHAIN for longer TRs for
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+ * epXout cause that DMA stuck after handling LINK TRB.
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+ * To eliminate this strange behavioral driver set TRB_CHAIN
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+ * bit only for TR size > 2.
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+ */
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+ if (priv_ep->type == USB_ENDPOINT_XFER_ISOC ||
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+ TRBS_PER_SEGMENT > 2)
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+ ch_bit = TRB_CHAIN;
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+
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link_trb->control = ((priv_ep->pcs) ? TRB_CYCLE : 0) |
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- TRB_TYPE(TRB_LINK) | TRB_CHAIN |
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- TRB_TOGGLE;
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+ TRB_TYPE(TRB_LINK) | TRB_TOGGLE | ch_bit;
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}
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- /* arm transfer on selected endpoint */
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- cdns3_select_ep(priv_ep->cdns3_dev, address);
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-
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- if (priv_dev->dev_ver < DEV_VER_V2)
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+ if (priv_dev->dev_ver <= DEV_VER_V2)
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togle_pcs = cdns3_wa1_update_guard(priv_ep, trb);
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/* set incorrect Cycle Bit for first trb*/
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control = priv_ep->pcs ? 0 : TRB_CYCLE;
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+
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do {
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u32 length;
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- u8 td_size = 0;
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+ u16 td_size = 0;
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/* fill TRB */
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control |= TRB_TYPE(TRB_NORMAL);
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@@ -863,11 +937,12 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
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control |= pcs | TRB_IOC | TRB_ISP;
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}
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- if (sg_iter) {
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+ if (sg_iter)
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trb->control = control;
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- control = 0;
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- }
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+ else
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+ priv_req->trb->control = control;
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+ control = 0;
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++sg_iter;
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priv_req->end_trb = priv_ep->enqueue;
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cdns3_ep_inc_enq(priv_ep);
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@@ -879,20 +954,18 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
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priv_req->flags |= REQUEST_PENDING;
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if (sg_iter == 1)
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- control |= TRB_IOC | TRB_ISP;
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+ trb->control |= TRB_IOC | TRB_ISP;
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/*
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* Memory barrier - cycle bit must be set before other filds in trb.
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*/
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wmb();
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+ /* give the TD to the consumer*/
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if (togle_pcs)
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- /* give the TD to the consumer*/
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- trb->control = control ^ 1;
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- else
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- trb->control = control;
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+ trb->control = trb->control ^ 1;
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- if (priv_dev->dev_ver < DEV_VER_V2)
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+ if (priv_dev->dev_ver <= DEV_VER_V2)
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cdns3_wa1_tray_restore_cycle_bit(priv_dev, priv_ep);
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trace_cdns3_prepare_trb(priv_ep, priv_req->trb);
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@@ -908,17 +981,26 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
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* enabling endpoint.
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*/
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if (priv_ep->flags & EP_UPDATE_EP_TRBADDR) {
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+ /*
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+ * Until SW is not ready to handle the OUT transfer the ISO OUT
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+ * Endpoint should be disabled (EP_CFG.ENABLE = 0).
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+ * EP_CFG_ENABLE must be set before updating ep_traddr.
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+ */
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+ if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir &&
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+ !(priv_ep->flags & EP_QUIRK_ISO_OUT_EN)) {
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+ priv_ep->flags |= EP_QUIRK_ISO_OUT_EN;
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+ cdns3_set_register_bit(&priv_dev->regs->ep_cfg,
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+ EP_CFG_ENABLE);
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+ }
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+
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writel(EP_TRADDR_TRADDR(priv_ep->trb_pool_dma +
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priv_req->start_trb * TRB_SIZE),
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- &priv_dev->regs->ep_traddr);
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-
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- cdns3_dbg(priv_ep->cdns3_dev, "Update ep_trbaddr for %s to %08x\n",
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- priv_ep->name, readl(&priv_dev->regs->ep_traddr));
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+ &priv_dev->regs->ep_traddr);
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priv_ep->flags &= ~EP_UPDATE_EP_TRBADDR;
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}
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- if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALL)) {
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+ if (!priv_ep->wa1_set && !(priv_ep->flags & EP_STALLED)) {
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trace_cdns3_ring(priv_ep);
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/*clearing TRBERR and EP_STS_DESCMIS before seting DRDY*/
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writel(EP_STS_TRBERR | EP_STS_DESCMIS, &priv_dev->regs->ep_sts);
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@@ -927,6 +1009,9 @@ int cdns3_ep_run_transfer(struct cdns3_endpoint *priv_ep,
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readl(&priv_dev->regs->ep_traddr));
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}
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+ /* WORKAROUND for transition to L0 */
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+ __cdns3_gadget_wakeup(priv_dev);
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+
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return 0;
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}
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@@ -934,7 +1019,7 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
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{
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struct cdns3_endpoint *priv_ep;
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struct usb_ep *ep;
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- int result = 0;
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+ int val;
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if (priv_dev->hw_configured_flag)
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return;
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@@ -946,11 +1031,10 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
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USB_CONF_U1EN | USB_CONF_U2EN);
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/* wait until configuration set */
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- result = cdns3_handshake(&priv_dev->regs->usb_sts,
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- USB_STS_CFGSTS_MASK, 1, 100);
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+ readl_poll_timeout_atomic(&priv_dev->regs->usb_sts, val,
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+ val & USB_STS_CFGSTS_MASK, 1, 100);
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priv_dev->hw_configured_flag = 1;
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- cdns3_allow_enable_l1(priv_dev, 1);
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list_for_each_entry(ep, &priv_dev->gadget.ep_list, ep_list) {
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if (ep->enabled) {
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@@ -984,6 +1068,9 @@ void cdns3_set_hw_configuration(struct cdns3_device *priv_dev)
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* some rules:
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* 1. priv_ep->dequeue never exceed current_index.
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* 2 priv_ep->enqueue never exceed priv_ep->dequeue
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+ * 3. exception: priv_ep->enqueue == priv_ep->dequeue
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+ * and priv_ep->free_trbs is zero.
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+ * This case indicate that TR is full.
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*
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* Then We can split recognition into two parts:
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* Case 1 - priv_ep->dequeue < current_index
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@@ -1007,17 +1094,29 @@ static bool cdns3_request_handled(struct cdns3_endpoint *priv_ep,
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struct cdns3_trb *trb = priv_req->trb;
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int current_index = 0;
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int handled = 0;
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+ int doorbell;
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- current_index = readl(&priv_dev->regs->ep_traddr) -
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- priv_ep->trb_pool_dma;
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- current_index /= TRB_SIZE;
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+ current_index = cdns3_get_dma_pos(priv_dev, priv_ep);
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+ doorbell = !!(readl(&priv_dev->regs->ep_cmd) & EP_CMD_DRDY);
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trb = &priv_ep->trb_pool[priv_req->start_trb];
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if ((trb->control & TRB_CYCLE) != priv_ep->ccs)
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goto finish;
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- if (priv_ep->dequeue < current_index) {
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+ if (doorbell == 1 && current_index == priv_ep->dequeue)
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+ goto finish;
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+
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+ /* The corner case for TRBS_PER_SEGMENT equal 2). */
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+ if (TRBS_PER_SEGMENT == 2 && priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
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+ handled = 1;
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+ goto finish;
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+ }
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+
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+ if (priv_ep->enqueue == priv_ep->dequeue &&
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+ priv_ep->free_trbs == 0) {
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+ handled = 1;
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+ } else if (priv_ep->dequeue < current_index) {
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if ((current_index == (priv_ep->num_trbs - 1)) &&
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!priv_ep->dequeue)
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goto finish;
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@@ -1054,7 +1153,7 @@ static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
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cdns3_select_ep(priv_dev, priv_ep->endpoint.address);
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if (!cdns3_request_handled(priv_ep, priv_req))
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- return;
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+ goto prepare_next_td;
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trb = priv_ep->trb_pool + priv_ep->dequeue;
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trace_cdns3_complete_trb(priv_ep, trb);
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@@ -1067,8 +1166,17 @@ static void cdns3_transfer_completed(struct cdns3_device *priv_dev,
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request->actual = TRB_LEN(le32_to_cpu(trb->length));
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cdns3_move_deq_to_next_trb(priv_req);
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cdns3_gadget_giveback(priv_ep, priv_req, 0);
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+
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+ if (priv_ep->type != USB_ENDPOINT_XFER_ISOC &&
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+ TRBS_PER_SEGMENT == 2)
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+ break;
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}
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priv_ep->flags &= ~EP_PENDING_REQUEST;
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+
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+prepare_next_td:
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+ if (!(priv_ep->flags & EP_STALLED) &&
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+ !(priv_ep->flags & EP_STALL_PENDING))
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+ cdns3_start_all_request(priv_dev, priv_ep);
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}
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void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
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@@ -1084,6 +1192,8 @@ void cdns3_rearm_transfer(struct cdns3_endpoint *priv_ep, u8 rearm)
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wmb();
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writel(EP_CMD_DRDY, &priv_dev->regs->ep_cmd);
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+ __cdns3_gadget_wakeup(priv_dev);
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+
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trace_cdns3_doorbell_epx(priv_ep->name,
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readl(&priv_dev->regs->ep_traddr));
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}
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@@ -1108,6 +1218,12 @@ static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
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writel(ep_sts_reg, &priv_dev->regs->ep_sts);
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if (ep_sts_reg & EP_STS_TRBERR) {
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+ if (priv_ep->flags & EP_STALL_PENDING &&
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+ !(ep_sts_reg & EP_STS_DESCMIS &&
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+ priv_dev->dev_ver < DEV_VER_V2)) {
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+ cdns3_ep_stall_flush(priv_ep);
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+ }
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+
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/*
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* For isochronous transfer driver completes request on
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* IOC or on TRBERR. IOC appears only when device receive
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@@ -1116,10 +1232,25 @@ static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
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* on TRBERR event.
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*/
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if (priv_ep->type == USB_ENDPOINT_XFER_ISOC &&
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- !priv_ep->wa1_set)
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+ !priv_ep->wa1_set) {
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+ if (!priv_ep->dir) {
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+ u32 ep_cfg = readl(&priv_dev->regs->ep_cfg);
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+
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+ ep_cfg &= ~EP_CFG_ENABLE;
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+ writel(ep_cfg, &priv_dev->regs->ep_cfg);
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+ priv_ep->flags &= ~EP_QUIRK_ISO_OUT_EN;
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+ }
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cdns3_transfer_completed(priv_dev, priv_ep);
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- else
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- cdns3_rearm_transfer(priv_ep, priv_ep->wa1_set);
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+ } else if (!(priv_ep->flags & EP_STALLED) &&
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+ !(priv_ep->flags & EP_STALL_PENDING)) {
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+ if (priv_ep->flags & EP_DEFERRED_DRDY) {
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+ priv_ep->flags &= ~EP_DEFERRED_DRDY;
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+ cdns3_start_all_request(priv_dev, priv_ep);
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+ } else {
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+ cdns3_rearm_transfer(priv_ep,
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+ priv_ep->wa1_set);
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+ }
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+ }
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}
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if ((ep_sts_reg & EP_STS_IOC) || (ep_sts_reg & EP_STS_ISP)) {
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@@ -1139,12 +1270,22 @@ static int cdns3_check_ep_interrupt_proceed(struct cdns3_endpoint *priv_ep)
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* priv_ep->flags & EP_QUIRK_EXTRA_BUF_EN.
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* In other cases this interrupt will be disabled/
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*/
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- if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2)
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+ if (ep_sts_reg & EP_STS_DESCMIS && priv_dev->dev_ver < DEV_VER_V2 &&
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+ !(priv_ep->flags & EP_STALLED))
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cdns3_wa2_descmissing_packet(priv_ep);
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return 0;
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}
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+static void cdns3_disconnect_gadget(struct cdns3_device *priv_dev)
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+{
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+ if (priv_dev->gadget_driver && priv_dev->gadget_driver->disconnect) {
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+ spin_unlock(&priv_dev->lock);
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+ priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
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+ spin_lock(&priv_dev->lock);
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+ }
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+}
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+
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/**
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* cdns3_check_usb_interrupt_proceed - Processes interrupt related to device
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* @priv_dev: extended gadget object
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@@ -1157,6 +1298,16 @@ static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
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int speed = 0;
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trace_cdns3_usb_irq(priv_dev, usb_ists);
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+ if (usb_ists & USB_ISTS_L1ENTI) {
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+ /*
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+ * WORKAROUND: CDNS3 controller has issue with hardware resuming
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+ * from L1. To fix it, if any DMA transfer is pending driver
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+ * must starts driving resume signal immediately.
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+ */
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+ if (readl(&priv_dev->regs->drbl))
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+ __cdns3_gadget_wakeup(priv_dev);
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+ }
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+
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/* Connection detected */
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if (usb_ists & (USB_ISTS_CON2I | USB_ISTS_CONI)) {
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speed = cdns3_get_speed(priv_dev);
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@@ -1167,33 +1318,44 @@ static void cdns3_check_usb_interrupt_proceed(struct cdns3_device *priv_dev,
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/* Disconnection detected */
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if (usb_ists & (USB_ISTS_DIS2I | USB_ISTS_DISI)) {
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+ cdns3_disconnect_gadget(priv_dev);
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+ priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
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+ usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
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+ cdns3_hw_reset_eps_config(priv_dev);
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+ }
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+
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+ if (usb_ists & (USB_ISTS_L2ENTI | USB_ISTS_U3ENTI)) {
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if (priv_dev->gadget_driver &&
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- priv_dev->gadget_driver->disconnect) {
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+ priv_dev->gadget_driver->suspend) {
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spin_unlock(&priv_dev->lock);
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- priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
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+ priv_dev->gadget_driver->suspend(&priv_dev->gadget);
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spin_lock(&priv_dev->lock);
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}
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+ }
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- priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
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- usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
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- cdns3_hw_reset_eps_config(priv_dev);
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+ if (usb_ists & (USB_ISTS_L2EXTI | USB_ISTS_U3EXTI)) {
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+ if (priv_dev->gadget_driver &&
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+ priv_dev->gadget_driver->resume) {
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+ spin_unlock(&priv_dev->lock);
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+ priv_dev->gadget_driver->resume(&priv_dev->gadget);
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+ spin_lock(&priv_dev->lock);
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+ }
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}
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/* reset*/
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if (usb_ists & (USB_ISTS_UWRESI | USB_ISTS_UHRESI | USB_ISTS_U2RESI)) {
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- if (priv_dev->gadget_driver &&
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- priv_dev->gadget_driver->reset) {
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+ if (priv_dev->gadget_driver) {
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spin_unlock(&priv_dev->lock);
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- priv_dev->gadget_driver->reset(&priv_dev->gadget);
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+ usb_gadget_udc_reset(&priv_dev->gadget,
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+ priv_dev->gadget_driver);
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spin_lock(&priv_dev->lock);
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- }
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- /*read again to check the actual speed*/
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- speed = cdns3_get_speed(priv_dev);
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- usb_gadget_set_state(&priv_dev->gadget, USB_STATE_DEFAULT);
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- priv_dev->gadget.speed = speed;
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- cdns3_hw_reset_eps_config(priv_dev);
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- cdns3_ep0_config(priv_dev);
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+ /*read again to check the actual speed*/
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+ speed = cdns3_get_speed(priv_dev);
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+ priv_dev->gadget.speed = speed;
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+ cdns3_hw_reset_eps_config(priv_dev);
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+ cdns3_ep0_config(priv_dev);
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+ }
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}
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}
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@@ -1210,33 +1372,33 @@ static irqreturn_t cdns3_device_irq_handler(int irq, void *data)
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struct cdns3_device *priv_dev;
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struct cdns3 *cdns = data;
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irqreturn_t ret = IRQ_NONE;
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- unsigned long flags;
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u32 reg;
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priv_dev = cdns->gadget_dev;
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- spin_lock_irqsave(&priv_dev->lock, flags);
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/* check USB device interrupt */
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reg = readl(&priv_dev->regs->usb_ists);
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- writel(reg, &priv_dev->regs->usb_ists);
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-
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if (reg) {
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- cdns3_check_usb_interrupt_proceed(priv_dev, reg);
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- ret = IRQ_HANDLED;
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+ /* After masking interrupts the new interrupts won't be
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+ * reported in usb_ists/ep_ists. In order to not lose some
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+ * of them driver disables only detected interrupts.
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+ * They will be enabled ASAP after clearing source of
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+ * interrupt. This an unusual behavior only applies to
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+ * usb_ists register.
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+ */
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+ reg = ~reg & readl(&priv_dev->regs->usb_ien);
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+ /* mask deferred interrupt. */
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+ writel(reg, &priv_dev->regs->usb_ien);
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+ ret = IRQ_WAKE_THREAD;
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}
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|
/* check endpoint interrupt */
|
|
|
reg = readl(&priv_dev->regs->ep_ists);
|
|
|
-
|
|
|
if (reg) {
|
|
|
- priv_dev->shadow_ep_en |= reg;
|
|
|
- reg = ~reg & readl(&priv_dev->regs->ep_ien);
|
|
|
- /* mask deferred interrupt. */
|
|
|
- writel(reg, &priv_dev->regs->ep_ien);
|
|
|
+ writel(0, &priv_dev->regs->ep_ien);
|
|
|
ret = IRQ_WAKE_THREAD;
|
|
|
}
|
|
|
|
|
|
- spin_unlock_irqrestore(&priv_dev->lock, flags);
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
@@ -1255,13 +1417,20 @@ static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
|
|
|
struct cdns3 *cdns = data;
|
|
|
irqreturn_t ret = IRQ_NONE;
|
|
|
unsigned long flags;
|
|
|
- u32 ep_ien;
|
|
|
int bit;
|
|
|
u32 reg;
|
|
|
|
|
|
priv_dev = cdns->gadget_dev;
|
|
|
spin_lock_irqsave(&priv_dev->lock, flags);
|
|
|
|
|
|
+ reg = readl(&priv_dev->regs->usb_ists);
|
|
|
+ if (reg) {
|
|
|
+ writel(reg, &priv_dev->regs->usb_ists);
|
|
|
+ writel(USB_IEN_INIT, &priv_dev->regs->usb_ien);
|
|
|
+ cdns3_check_usb_interrupt_proceed(priv_dev, reg);
|
|
|
+ ret = IRQ_HANDLED;
|
|
|
+ }
|
|
|
+
|
|
|
reg = readl(&priv_dev->regs->ep_ists);
|
|
|
|
|
|
/* handle default endpoint OUT */
|
|
|
@@ -1283,38 +1452,14 @@ static irqreturn_t cdns3_device_thread_irq_handler(int irq, void *data)
|
|
|
|
|
|
for_each_set_bit(bit, (unsigned long *)®,
|
|
|
sizeof(u32) * BITS_PER_BYTE) {
|
|
|
- priv_dev->shadow_ep_en |= BIT(bit);
|
|
|
cdns3_check_ep_interrupt_proceed(priv_dev->eps[bit]);
|
|
|
ret = IRQ_HANDLED;
|
|
|
}
|
|
|
|
|
|
- if (priv_dev->run_garbage_colector) {
|
|
|
- struct cdns3_aligned_buf *buf, *tmp;
|
|
|
-
|
|
|
- list_for_each_entry_safe(buf, tmp, &priv_dev->aligned_buf_list,
|
|
|
- list) {
|
|
|
- if (!buf->in_use) {
|
|
|
- list_del(&buf->list);
|
|
|
-
|
|
|
- spin_unlock_irqrestore(&priv_dev->lock, flags);
|
|
|
- dma_free_coherent(priv_dev->sysdev, buf->size,
|
|
|
- buf->buf,
|
|
|
- buf->dma);
|
|
|
- spin_lock_irqsave(&priv_dev->lock, flags);
|
|
|
-
|
|
|
- kfree(buf);
|
|
|
- }
|
|
|
- }
|
|
|
-
|
|
|
- priv_dev->run_garbage_colector = 0;
|
|
|
- }
|
|
|
-
|
|
|
irqend:
|
|
|
- ep_ien = readl(&priv_dev->regs->ep_ien) | priv_dev->shadow_ep_en;
|
|
|
- priv_dev->shadow_ep_en = 0;
|
|
|
- /* Unmask all handled EP interrupts */
|
|
|
- writel(ep_ien, &priv_dev->regs->ep_ien);
|
|
|
+ writel(~0, &priv_dev->regs->ep_ien);
|
|
|
spin_unlock_irqrestore(&priv_dev->lock, flags);
|
|
|
+
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
@@ -1333,33 +1478,72 @@ irqend:
|
|
|
static int cdns3_ep_onchip_buffer_reserve(struct cdns3_device *priv_dev,
|
|
|
int size, int is_in)
|
|
|
{
|
|
|
- u32 onchip_mem;
|
|
|
+ int remained;
|
|
|
+
|
|
|
+ /* 2KB are reserved for EP0*/
|
|
|
+ remained = priv_dev->onchip_buffers - priv_dev->onchip_used_size - 2;
|
|
|
|
|
|
if (is_in) {
|
|
|
- priv_dev->onchip_mem_allocated_size += size;
|
|
|
+ if (remained < size)
|
|
|
+ return -EPERM;
|
|
|
+
|
|
|
+ priv_dev->onchip_used_size += size;
|
|
|
} else {
|
|
|
- /* ALL OUT EPs are shared the same chunk onchip memory */
|
|
|
- if (size > priv_dev->out_mem_is_allocated) {
|
|
|
- priv_dev->onchip_mem_allocated_size -= priv_dev->out_mem_is_allocated;
|
|
|
- priv_dev->onchip_mem_allocated_size += size;
|
|
|
- priv_dev->out_mem_is_allocated += size;
|
|
|
- }
|
|
|
- }
|
|
|
+ int required;
|
|
|
|
|
|
- onchip_mem = USB_CAP2_ACTUAL_MEM_SIZE(readl(&priv_dev->regs->usb_cap2));
|
|
|
- if (!onchip_mem)
|
|
|
- onchip_mem = 256;
|
|
|
+ /**
|
|
|
+ * ALL OUT EPs are shared the same chunk onchip memory, so
|
|
|
+ * driver checks if it already has assigned enough buffers
|
|
|
+ */
|
|
|
+ if (priv_dev->out_mem_is_allocated >= size)
|
|
|
+ return 0;
|
|
|
|
|
|
- /* 2KB is reserved for EP0*/
|
|
|
- onchip_mem -= 2;
|
|
|
- if (priv_dev->onchip_mem_allocated_size > onchip_mem) {
|
|
|
- priv_dev->onchip_mem_allocated_size -= size;
|
|
|
- return -EPERM;
|
|
|
+ required = size - priv_dev->out_mem_is_allocated;
|
|
|
+
|
|
|
+ if (required > remained)
|
|
|
+ return -EPERM;
|
|
|
+
|
|
|
+ priv_dev->out_mem_is_allocated += required;
|
|
|
+ priv_dev->onchip_used_size += required;
|
|
|
}
|
|
|
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+void cdns3_configure_dmult(struct cdns3_device *priv_dev,
|
|
|
+ struct cdns3_endpoint *priv_ep)
|
|
|
+{
|
|
|
+ struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
|
|
|
+
|
|
|
+ /* For dev_ver > DEV_VER_V2 DMULT is configured per endpoint */
|
|
|
+ if (priv_dev->dev_ver <= DEV_VER_V2)
|
|
|
+ writel(USB_CONF_DMULT, ®s->usb_conf);
|
|
|
+
|
|
|
+ if (priv_dev->dev_ver == DEV_VER_V2)
|
|
|
+ writel(USB_CONF2_EN_TDL_TRB, ®s->usb_conf2);
|
|
|
+
|
|
|
+ if (priv_dev->dev_ver >= DEV_VER_V3 && priv_ep) {
|
|
|
+ u32 mask;
|
|
|
+
|
|
|
+ if (priv_ep->dir)
|
|
|
+ mask = BIT(priv_ep->num + 16);
|
|
|
+ else
|
|
|
+ mask = BIT(priv_ep->num);
|
|
|
+
|
|
|
+ if (priv_ep->type != USB_ENDPOINT_XFER_ISOC) {
|
|
|
+ cdns3_set_register_bit(®s->tdl_from_trb, mask);
|
|
|
+ cdns3_set_register_bit(®s->tdl_beh, mask);
|
|
|
+ cdns3_set_register_bit(®s->tdl_beh2, mask);
|
|
|
+ cdns3_set_register_bit(®s->dma_adv_td, mask);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
|
|
|
+ cdns3_set_register_bit(®s->tdl_from_trb, mask);
|
|
|
+
|
|
|
+ cdns3_set_register_bit(®s->dtrans, mask);
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
/**
|
|
|
* cdns3_ep_config Configure hardware endpoint
|
|
|
* @priv_ep: extended endpoint object
|
|
|
@@ -1370,25 +1554,29 @@ void cdns3_ep_config(struct cdns3_endpoint *priv_ep)
|
|
|
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
|
|
|
u32 bEndpointAddress = priv_ep->num | priv_ep->dir;
|
|
|
u32 max_packet_size = 0;
|
|
|
- u8 buffering;
|
|
|
u8 maxburst = 0;
|
|
|
u32 ep_cfg = 0;
|
|
|
+ u8 buffering;
|
|
|
u8 mult = 0;
|
|
|
int ret;
|
|
|
|
|
|
buffering = CDNS3_EP_BUF_SIZE - 1;
|
|
|
|
|
|
+ cdns3_configure_dmult(priv_dev, priv_ep);
|
|
|
+
|
|
|
switch (priv_ep->type) {
|
|
|
case USB_ENDPOINT_XFER_INT:
|
|
|
ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_INT);
|
|
|
|
|
|
- if (priv_dev->dev_ver >= DEV_VER_V2)
|
|
|
+ if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
|
|
|
+ priv_dev->dev_ver > DEV_VER_V2)
|
|
|
ep_cfg |= EP_CFG_TDL_CHK;
|
|
|
break;
|
|
|
case USB_ENDPOINT_XFER_BULK:
|
|
|
ep_cfg = EP_CFG_EPTYPE(USB_ENDPOINT_XFER_BULK);
|
|
|
|
|
|
- if (priv_dev->dev_ver >= DEV_VER_V2)
|
|
|
+ if ((priv_dev->dev_ver == DEV_VER_V2 && !priv_ep->dir) ||
|
|
|
+ priv_dev->dev_ver > DEV_VER_V2)
|
|
|
ep_cfg |= EP_CFG_TDL_CHK;
|
|
|
break;
|
|
|
default:
|
|
|
@@ -1431,7 +1619,7 @@ void cdns3_ep_config(struct cdns3_endpoint *priv_ep)
|
|
|
else
|
|
|
priv_ep->trb_burst_size = 16;
|
|
|
|
|
|
- ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering,
|
|
|
+ ret = cdns3_ep_onchip_buffer_reserve(priv_dev, buffering + 1,
|
|
|
!!priv_ep->dir);
|
|
|
if (ret) {
|
|
|
dev_err(priv_dev->dev, "onchip mem is full, ep is invalid\n");
|
|
|
@@ -1586,7 +1774,9 @@ static int cdns3_gadget_ep_enable(struct usb_ep *ep,
|
|
|
u32 reg = EP_STS_EN_TRBERREN;
|
|
|
u32 bEndpointAddress;
|
|
|
unsigned long flags;
|
|
|
+ int enable = 1;
|
|
|
int ret;
|
|
|
+ int val;
|
|
|
|
|
|
priv_ep = ep_to_cdns3_ep(ep);
|
|
|
priv_dev = priv_ep->cdns3_dev;
|
|
|
@@ -1632,8 +1822,15 @@ static int cdns3_gadget_ep_enable(struct usb_ep *ep,
|
|
|
|
|
|
writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
|
|
|
|
|
|
- ret = cdns3_handshake(&priv_dev->regs->ep_cmd,
|
|
|
- EP_CMD_CSTALL | EP_CMD_EPRST, 0, 1000);
|
|
|
+ ret = readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
|
|
|
+ !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
|
|
|
+ 1, 1000);
|
|
|
+
|
|
|
+ if (unlikely(ret)) {
|
|
|
+ cdns3_free_trb_pool(priv_ep);
|
|
|
+ ret = -EINVAL;
|
|
|
+ goto exit;
|
|
|
+ }
|
|
|
|
|
|
/* enable interrupt for selected endpoint */
|
|
|
cdns3_set_register_bit(&priv_dev->regs->ep_ien,
|
|
|
@@ -1644,11 +1841,23 @@ static int cdns3_gadget_ep_enable(struct usb_ep *ep,
|
|
|
|
|
|
writel(reg, &priv_dev->regs->ep_sts_en);
|
|
|
|
|
|
- cdns3_set_register_bit(&priv_dev->regs->ep_cfg, EP_CFG_ENABLE);
|
|
|
+ /*
|
|
|
+ * For some versions of controller at some point during ISO OUT traffic
|
|
|
+ * DMA reads Transfer Ring for the EP which has never got doorbell.
|
|
|
+ * This issue was detected only on simulation, but to avoid this issue
|
|
|
+ * driver add protection against it. To fix it driver enable ISO OUT
|
|
|
+ * endpoint before setting DRBL. This special treatment of ISO OUT
|
|
|
+ * endpoints are recommended by controller specification.
|
|
|
+ */
|
|
|
+ if (priv_ep->type == USB_ENDPOINT_XFER_ISOC && !priv_ep->dir)
|
|
|
+ enable = 0;
|
|
|
+
|
|
|
+ if (enable)
|
|
|
+ cdns3_set_register_bit(&priv_dev->regs->ep_cfg, EP_CFG_ENABLE);
|
|
|
|
|
|
ep->desc = desc;
|
|
|
- priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALL |
|
|
|
- EP_QUIRK_EXTRA_BUF_EN);
|
|
|
+ priv_ep->flags &= ~(EP_PENDING_REQUEST | EP_STALLED | EP_STALL_PENDING |
|
|
|
+ EP_QUIRK_ISO_OUT_EN | EP_QUIRK_EXTRA_BUF_EN);
|
|
|
priv_ep->flags |= EP_ENABLED | EP_UPDATE_EP_TRBADDR;
|
|
|
priv_ep->wa1_set = 0;
|
|
|
priv_ep->enqueue = 0;
|
|
|
@@ -1679,6 +1888,7 @@ static int cdns3_gadget_ep_disable(struct usb_ep *ep)
|
|
|
unsigned long flags;
|
|
|
int ret = 0;
|
|
|
u32 ep_cfg;
|
|
|
+ int val;
|
|
|
|
|
|
if (!ep) {
|
|
|
pr_err("usbss: invalid parameters\n");
|
|
|
@@ -1702,10 +1912,22 @@ static int cdns3_gadget_ep_disable(struct usb_ep *ep)
|
|
|
ep_cfg &= ~EP_CFG_ENABLE;
|
|
|
writel(ep_cfg, &priv_dev->regs->ep_cfg);
|
|
|
|
|
|
+ /**
|
|
|
+ * Driver needs some time before resetting endpoint.
|
|
|
+ * It need waits for clearing DBUSY bit or for timeout expired.
|
|
|
+ * 10us is enough time for controller to stop transfer.
|
|
|
+ */
|
|
|
+ readl_poll_timeout_atomic(&priv_dev->regs->ep_sts, val,
|
|
|
+ !(val & EP_STS_DBUSY), 1, 10);
|
|
|
writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
|
|
|
|
|
|
- ret = cdns3_handshake(&priv_dev->regs->ep_cmd,
|
|
|
- EP_CMD_CSTALL | EP_CMD_EPRST, 0, 1000);
|
|
|
+ readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
|
|
|
+ !(val & (EP_CMD_CSTALL | EP_CMD_EPRST)),
|
|
|
+ 1, 1000);
|
|
|
+ if (unlikely(ret))
|
|
|
+ dev_err(priv_dev->dev, "Timeout: %s resetting failed.\n",
|
|
|
+ priv_ep->name);
|
|
|
+
|
|
|
while (!list_empty(&priv_ep->pending_req_list)) {
|
|
|
request = cdns3_next_request(&priv_ep->pending_req_list);
|
|
|
|
|
|
@@ -1755,7 +1977,6 @@ static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
|
|
|
struct cdns3_endpoint *priv_ep = ep_to_cdns3_ep(ep);
|
|
|
struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
|
|
|
struct cdns3_request *priv_req;
|
|
|
- int deferred = 0;
|
|
|
int ret = 0;
|
|
|
|
|
|
request->actual = 0;
|
|
|
@@ -1763,9 +1984,13 @@ static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
|
|
|
priv_req = to_cdns3_request(request);
|
|
|
trace_cdns3_ep_queue(priv_req);
|
|
|
|
|
|
- if (priv_dev->dev_ver < DEV_VER_V2)
|
|
|
- deferred = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
|
|
|
- priv_req);
|
|
|
+ if (priv_dev->dev_ver < DEV_VER_V2) {
|
|
|
+ ret = cdns3_wa2_gadget_ep_queue(priv_dev, priv_ep,
|
|
|
+ priv_req);
|
|
|
+
|
|
|
+ if (ret == EINPROGRESS)
|
|
|
+ return 0;
|
|
|
+ }
|
|
|
|
|
|
ret = cdns3_prepare_aligned_request_buf(priv_req);
|
|
|
if (ret < 0)
|
|
|
@@ -1776,22 +2001,18 @@ static int __cdns3_gadget_ep_queue(struct usb_ep *ep,
|
|
|
if (ret)
|
|
|
return ret;
|
|
|
|
|
|
+ list_add_tail(&request->list, &priv_ep->deferred_req_list);
|
|
|
+
|
|
|
/*
|
|
|
* If hardware endpoint configuration has not been set yet then
|
|
|
* just queue request in deferred list. Transfer will be started in
|
|
|
* cdns3_set_hw_configuration.
|
|
|
*/
|
|
|
- if (!priv_dev->hw_configured_flag)
|
|
|
- deferred = 1;
|
|
|
- else
|
|
|
- ret = cdns3_ep_run_transfer(priv_ep, request);
|
|
|
-
|
|
|
- if (ret || deferred)
|
|
|
- list_add_tail(&request->list, &priv_ep->deferred_req_list);
|
|
|
- else
|
|
|
- list_add_tail(&request->list, &priv_ep->pending_req_list);
|
|
|
+ if (priv_dev->hw_configured_flag && !(priv_ep->flags & EP_STALLED) &&
|
|
|
+ !(priv_ep->flags & EP_STALL_PENDING))
|
|
|
+ cdns3_start_all_request(priv_dev, priv_ep);
|
|
|
|
|
|
- return ret;
|
|
|
+ return 0;
|
|
|
}
|
|
|
|
|
|
static int cdns3_gadget_ep_queue(struct usb_ep *ep, struct usb_request *request,
|
|
|
@@ -1903,6 +2124,60 @@ not_found:
|
|
|
return ret;
|
|
|
}
|
|
|
|
|
|
+/**
|
|
|
+ * __cdns3_gadget_ep_set_halt Sets stall on selected endpoint
|
|
|
+ * Should be called after acquiring spin_lock and selecting ep
|
|
|
+ * @ep: endpoint object to set stall on.
|
|
|
+ */
|
|
|
+void __cdns3_gadget_ep_set_halt(struct cdns3_endpoint *priv_ep)
|
|
|
+{
|
|
|
+ struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
|
|
|
+
|
|
|
+ trace_cdns3_halt(priv_ep, 1, 0);
|
|
|
+
|
|
|
+ if (!(priv_ep->flags & EP_STALLED)) {
|
|
|
+ u32 ep_sts_reg = readl(&priv_dev->regs->ep_sts);
|
|
|
+
|
|
|
+ if (!(ep_sts_reg & EP_STS_DBUSY))
|
|
|
+ cdns3_ep_stall_flush(priv_ep);
|
|
|
+ else
|
|
|
+ priv_ep->flags |= EP_STALL_PENDING;
|
|
|
+ }
|
|
|
+}
|
|
|
+
|
|
|
+/**
|
|
|
+ * __cdns3_gadget_ep_clear_halt Clears stall on selected endpoint
|
|
|
+ * Should be called after acquiring spin_lock and selecting ep
|
|
|
+ * @ep: endpoint object to clear stall on
|
|
|
+ */
|
|
|
+int __cdns3_gadget_ep_clear_halt(struct cdns3_endpoint *priv_ep)
|
|
|
+{
|
|
|
+ struct cdns3_device *priv_dev = priv_ep->cdns3_dev;
|
|
|
+ struct usb_request *request;
|
|
|
+ int ret = 0;
|
|
|
+ int val;
|
|
|
+
|
|
|
+ trace_cdns3_halt(priv_ep, 0, 0);
|
|
|
+
|
|
|
+ writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
|
|
|
+
|
|
|
+ /* wait for EPRST cleared */
|
|
|
+ readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
|
|
|
+ !(val & EP_CMD_EPRST), 1, 100);
|
|
|
+ if (ret)
|
|
|
+ return -EINVAL;
|
|
|
+
|
|
|
+ priv_ep->flags &= ~(EP_STALLED | EP_STALL_PENDING);
|
|
|
+
|
|
|
+ request = cdns3_next_request(&priv_ep->pending_req_list);
|
|
|
+
|
|
|
+ if (request)
|
|
|
+ cdns3_rearm_transfer(priv_ep, 1);
|
|
|
+
|
|
|
+ cdns3_start_all_request(priv_dev, priv_ep);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
/**
|
|
|
* cdns3_gadget_ep_set_halt Sets/clears stall on selected endpoint
|
|
|
* @ep: endpoint object to set/clear stall on
|
|
|
@@ -1923,32 +2198,14 @@ int cdns3_gadget_ep_set_halt(struct usb_ep *ep, int value)
|
|
|
spin_lock_irqsave(&priv_dev->lock, flags);
|
|
|
|
|
|
cdns3_select_ep(priv_dev, ep->desc->bEndpointAddress);
|
|
|
- if (value) {
|
|
|
- cdns3_ep_stall_flush(priv_ep);
|
|
|
- } else {
|
|
|
- priv_ep->flags &= ~EP_WEDGE;
|
|
|
-
|
|
|
- cdns3_dbg(priv_ep->cdns3_dev, "Clear stalled endpoint %s\n",
|
|
|
- priv_ep->name);
|
|
|
-
|
|
|
- writel(EP_CMD_CSTALL | EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
|
|
|
|
|
|
- /* wait for EPRST cleared */
|
|
|
- ret = cdns3_handshake(&priv_dev->regs->ep_cmd,
|
|
|
- EP_CMD_EPRST, 0, 100);
|
|
|
- if (unlikely(ret)) {
|
|
|
- dev_err(priv_dev->dev,
|
|
|
- "Clearing halt condition failed for %s\n",
|
|
|
- priv_ep->name);
|
|
|
- goto finish;
|
|
|
-
|
|
|
- } else {
|
|
|
- priv_ep->flags &= ~EP_STALL;
|
|
|
- }
|
|
|
+ if (!value) {
|
|
|
+ priv_ep->flags &= ~EP_WEDGE;
|
|
|
+ ret = __cdns3_gadget_ep_clear_halt(priv_ep);
|
|
|
+ } else {
|
|
|
+ __cdns3_gadget_ep_set_halt(priv_ep);
|
|
|
}
|
|
|
|
|
|
- priv_ep->flags &= ~EP_PENDING_REQUEST;
|
|
|
-finish:
|
|
|
spin_unlock_irqrestore(&priv_dev->lock, flags);
|
|
|
|
|
|
return ret;
|
|
|
@@ -1980,11 +2237,33 @@ static int cdns3_gadget_get_frame(struct usb_gadget *gadget)
|
|
|
return readl(&priv_dev->regs->usb_itpn);
|
|
|
}
|
|
|
|
|
|
-static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
|
|
|
+int __cdns3_gadget_wakeup(struct cdns3_device *priv_dev)
|
|
|
{
|
|
|
+ enum usb_device_speed speed;
|
|
|
+
|
|
|
+ speed = cdns3_get_speed(priv_dev);
|
|
|
+
|
|
|
+ if (speed >= USB_SPEED_SUPER)
|
|
|
+ return 0;
|
|
|
+
|
|
|
+ /* Start driving resume signaling to indicate remote wakeup. */
|
|
|
+ writel(USB_CONF_LGO_L0, &priv_dev->regs->usb_conf);
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
+static int cdns3_gadget_wakeup(struct usb_gadget *gadget)
|
|
|
+{
|
|
|
+ struct cdns3_device *priv_dev = gadget_to_cdns3_device(gadget);
|
|
|
+ unsigned long flags;
|
|
|
+ int ret = 0;
|
|
|
+
|
|
|
+ spin_lock_irqsave(&priv_dev->lock, flags);
|
|
|
+ ret = __cdns3_gadget_wakeup(priv_dev);
|
|
|
+ spin_unlock_irqrestore(&priv_dev->lock, flags);
|
|
|
+ return ret;
|
|
|
+}
|
|
|
+
|
|
|
static int cdns3_gadget_set_selfpowered(struct usb_gadget *gadget,
|
|
|
int is_selfpowered)
|
|
|
{
|
|
|
@@ -2012,6 +2291,7 @@ static int cdns3_gadget_pullup(struct usb_gadget *gadget, int is_on)
|
|
|
static void cdns3_gadget_config(struct cdns3_device *priv_dev)
|
|
|
{
|
|
|
struct cdns3_usb_regs __iomem *regs = priv_dev->regs;
|
|
|
+ u32 reg;
|
|
|
|
|
|
cdns3_ep0_config(priv_dev);
|
|
|
|
|
|
@@ -2019,11 +2299,11 @@ static void cdns3_gadget_config(struct cdns3_device *priv_dev)
|
|
|
writel(EP_IEN_EP_OUT0 | EP_IEN_EP_IN0, ®s->ep_ien);
|
|
|
|
|
|
/*
|
|
|
- *Driver need modify LFPS minimal U1 Exit time for 0x00024505 revision
|
|
|
- * of controller
|
|
|
+ * Driver needs to modify LFPS minimal U1 Exit time for DEV_VER_TI_V1
|
|
|
+ * revision of controller.
|
|
|
*/
|
|
|
if (priv_dev->dev_ver == DEV_VER_TI_V1) {
|
|
|
- u32 reg = readl(®s->dbg_link1);
|
|
|
+ reg = readl(®s->dbg_link1);
|
|
|
|
|
|
reg &= ~DBG_LINK1_LFPS_MIN_GEN_U1_EXIT_MASK;
|
|
|
reg |= DBG_LINK1_LFPS_MIN_GEN_U1_EXIT(0x55) |
|
|
|
@@ -2031,12 +2311,21 @@ static void cdns3_gadget_config(struct cdns3_device *priv_dev)
|
|
|
writel(reg, ®s->dbg_link1);
|
|
|
}
|
|
|
|
|
|
+ /*
|
|
|
+ * By default some platforms has set protected access to memory.
|
|
|
+ * This cause problem with cache, so driver restore non-secure
|
|
|
+ * access to memory.
|
|
|
+ */
|
|
|
+ reg = readl(®s->dma_axi_ctrl);
|
|
|
+ reg |= DMA_AXI_CTRL_MARPROT(DMA_AXI_CTRL_NON_SECURE) |
|
|
|
+ DMA_AXI_CTRL_MAWPROT(DMA_AXI_CTRL_NON_SECURE);
|
|
|
+ writel(reg, ®s->dma_axi_ctrl);
|
|
|
+
|
|
|
/* enable generic interrupt*/
|
|
|
writel(USB_IEN_INIT, ®s->usb_ien);
|
|
|
writel(USB_CONF_CLK2OFFDS | USB_CONF_L1DS, ®s->usb_conf);
|
|
|
- writel(USB_CONF_DMULT, ®s->usb_conf);
|
|
|
- if (priv_dev->dev_ver >= DEV_VER_V2)
|
|
|
- writel(USB_CONF2_EN_TDL_TRB, ®s->usb_conf2);
|
|
|
+
|
|
|
+ cdns3_configure_dmult(priv_dev, NULL);
|
|
|
|
|
|
cdns3_gadget_pullup(&priv_dev->gadget, 1);
|
|
|
}
|
|
|
@@ -2074,10 +2363,11 @@ static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
|
|
|
u32 bEndpointAddress;
|
|
|
struct usb_ep *ep;
|
|
|
int ret = 0;
|
|
|
+ int val;
|
|
|
|
|
|
priv_dev->gadget_driver = NULL;
|
|
|
|
|
|
- priv_dev->onchip_mem_allocated_size = 0;
|
|
|
+ priv_dev->onchip_used_size = 0;
|
|
|
priv_dev->out_mem_is_allocated = 0;
|
|
|
priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
|
|
|
|
|
|
@@ -2086,9 +2376,8 @@ static int cdns3_gadget_udc_stop(struct usb_gadget *gadget)
|
|
|
bEndpointAddress = priv_ep->num | priv_ep->dir;
|
|
|
cdns3_select_ep(priv_dev, bEndpointAddress);
|
|
|
writel(EP_CMD_EPRST, &priv_dev->regs->ep_cmd);
|
|
|
- ret = cdns3_handshake(&priv_dev->regs->ep_cmd,
|
|
|
- EP_CMD_EPRST, 0, 100);
|
|
|
- cdns3_free_trb_pool(priv_ep);
|
|
|
+ readl_poll_timeout_atomic(&priv_dev->regs->ep_cmd, val,
|
|
|
+ !(val & EP_CMD_EPRST), 1, 100);
|
|
|
}
|
|
|
|
|
|
/* disable interrupt for device */
|
|
|
@@ -2112,14 +2401,14 @@ static void cdns3_free_all_eps(struct cdns3_device *priv_dev)
|
|
|
{
|
|
|
int i;
|
|
|
|
|
|
- /*ep0 OUT point to ep0 IN*/
|
|
|
+ /* ep0 OUT point to ep0 IN. */
|
|
|
priv_dev->eps[16] = NULL;
|
|
|
|
|
|
- cdns3_free_trb_pool(priv_dev->eps[0]);
|
|
|
-
|
|
|
for (i = 0; i < CDNS3_ENDPOINTS_MAX_COUNT; i++)
|
|
|
- if (priv_dev->eps[i])
|
|
|
+ if (priv_dev->eps[i]) {
|
|
|
+ cdns3_free_trb_pool(priv_dev->eps[i]);
|
|
|
devm_kfree(priv_dev->dev, priv_dev->eps[i]);
|
|
|
+ }
|
|
|
}
|
|
|
|
|
|
/**
|
|
|
@@ -2217,27 +2506,12 @@ err:
|
|
|
return -ENOMEM;
|
|
|
}
|
|
|
|
|
|
-static void cdns3_gadget_disable(struct cdns3 *cdns)
|
|
|
-{
|
|
|
- struct cdns3_device *priv_dev;
|
|
|
-
|
|
|
- priv_dev = cdns->gadget_dev;
|
|
|
-
|
|
|
- if (priv_dev->gadget_driver)
|
|
|
- priv_dev->gadget_driver->disconnect(&priv_dev->gadget);
|
|
|
-
|
|
|
- usb_gadget_disconnect(&priv_dev->gadget);
|
|
|
- priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
|
|
|
-}
|
|
|
-
|
|
|
void cdns3_gadget_exit(struct cdns3 *cdns)
|
|
|
{
|
|
|
struct cdns3_device *priv_dev;
|
|
|
|
|
|
priv_dev = cdns->gadget_dev;
|
|
|
|
|
|
- cdns3_gadget_disable(cdns);
|
|
|
-
|
|
|
devm_free_irq(cdns->dev, cdns->dev_irq, cdns);
|
|
|
|
|
|
pm_runtime_mark_last_busy(cdns->dev);
|
|
|
@@ -2283,12 +2557,29 @@ static int cdns3_gadget_start(struct cdns3 *cdns)
|
|
|
priv_dev->dev = cdns->dev;
|
|
|
priv_dev->regs = cdns->dev_regs;
|
|
|
|
|
|
+ device_property_read_u16(priv_dev->dev, "cdns,on-chip-buff-size",
|
|
|
+ &priv_dev->onchip_buffers);
|
|
|
+
|
|
|
+ if (priv_dev->onchip_buffers <= 0) {
|
|
|
+ u32 reg = readl(&priv_dev->regs->usb_cap2);
|
|
|
+
|
|
|
+ priv_dev->onchip_buffers = USB_CAP2_ACTUAL_MEM_SIZE(reg);
|
|
|
+ }
|
|
|
+
|
|
|
+ if (!priv_dev->onchip_buffers)
|
|
|
+ priv_dev->onchip_buffers = 256;
|
|
|
+
|
|
|
max_speed = usb_get_maximum_speed(cdns->dev);
|
|
|
|
|
|
/* Check the maximum_speed parameter */
|
|
|
switch (max_speed) {
|
|
|
case USB_SPEED_FULL:
|
|
|
+ writel(USB_CONF_SFORCE_FS, &priv_dev->regs->usb_conf);
|
|
|
+ writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
|
|
|
+ break;
|
|
|
case USB_SPEED_HIGH:
|
|
|
+ writel(USB_CONF_USB3DIS, &priv_dev->regs->usb_conf);
|
|
|
+ break;
|
|
|
case USB_SPEED_SUPER:
|
|
|
break;
|
|
|
default:
|
|
|
@@ -2307,11 +2598,15 @@ static int cdns3_gadget_start(struct cdns3 *cdns)
|
|
|
priv_dev->gadget.ops = &cdns3_gadget_ops;
|
|
|
priv_dev->gadget.name = "usb-ss-gadget";
|
|
|
priv_dev->gadget.sg_supported = 1;
|
|
|
+ priv_dev->gadget.quirk_avoids_skb_reserve = 1;
|
|
|
|
|
|
spin_lock_init(&priv_dev->lock);
|
|
|
INIT_WORK(&priv_dev->pending_status_wq,
|
|
|
cdns3_pending_setup_status_handler);
|
|
|
|
|
|
+ INIT_WORK(&priv_dev->aligned_buf_wq,
|
|
|
+ cdns3_free_aligned_request_buf);
|
|
|
+
|
|
|
/* initialize endpoint container */
|
|
|
INIT_LIST_HEAD(&priv_dev->gadget.ep_list);
|
|
|
INIT_LIST_HEAD(&priv_dev->aligned_buf_list);
|
|
|
@@ -2326,7 +2621,6 @@ static int cdns3_gadget_start(struct cdns3 *cdns)
|
|
|
priv_dev->setup_buf = dma_alloc_coherent(priv_dev->sysdev, 8,
|
|
|
&priv_dev->setup_dma, GFP_DMA);
|
|
|
if (!priv_dev->setup_buf) {
|
|
|
- dev_err(priv_dev->dev, "Failed to allocate memory for SETUP buffer\n");
|
|
|
ret = -ENOMEM;
|
|
|
goto err2;
|
|
|
}
|
|
|
@@ -2382,10 +2676,16 @@ static int __cdns3_gadget_init(struct cdns3 *cdns)
|
|
|
return ret;
|
|
|
|
|
|
priv_dev = cdns->gadget_dev;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * Because interrupt line can be shared with other components in
|
|
|
+ * driver it can't use IRQF_ONESHOT flag here.
|
|
|
+ */
|
|
|
ret = devm_request_threaded_irq(cdns->dev, cdns->dev_irq,
|
|
|
cdns3_device_irq_handler,
|
|
|
cdns3_device_thread_irq_handler,
|
|
|
IRQF_SHARED, dev_name(cdns->dev), cdns);
|
|
|
+
|
|
|
if (ret)
|
|
|
goto err0;
|
|
|
|
|
|
@@ -2397,25 +2697,31 @@ err0:
|
|
|
|
|
|
static int cdns3_gadget_suspend(struct cdns3 *cdns, bool do_wakeup)
|
|
|
{
|
|
|
- cdns3_gadget_disable(cdns);
|
|
|
+ struct cdns3_device *priv_dev = cdns->gadget_dev;
|
|
|
+
|
|
|
+ cdns3_disconnect_gadget(priv_dev);
|
|
|
+
|
|
|
+ priv_dev->gadget.speed = USB_SPEED_UNKNOWN;
|
|
|
+ usb_gadget_set_state(&priv_dev->gadget, USB_STATE_NOTATTACHED);
|
|
|
+ cdns3_hw_reset_eps_config(priv_dev);
|
|
|
+
|
|
|
+ /* disable interrupt for device */
|
|
|
+ writel(0, &priv_dev->regs->usb_ien);
|
|
|
+
|
|
|
+ cdns3_gadget_pullup(&priv_dev->gadget, 0);
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
static int cdns3_gadget_resume(struct cdns3 *cdns, bool hibernated)
|
|
|
{
|
|
|
- struct cdns3_device *priv_dev;
|
|
|
- unsigned long flags;
|
|
|
+ struct cdns3_device *priv_dev = cdns->gadget_dev;
|
|
|
|
|
|
- priv_dev = cdns->gadget_dev;
|
|
|
- spin_lock_irqsave(&priv_dev->lock, flags);
|
|
|
-
|
|
|
- if (!priv_dev->gadget_driver) {
|
|
|
- spin_unlock_irqrestore(&priv_dev->lock, flags);
|
|
|
+ if (!priv_dev->gadget_driver)
|
|
|
return 0;
|
|
|
- }
|
|
|
|
|
|
cdns3_gadget_config(priv_dev);
|
|
|
- spin_unlock_irqrestore(&priv_dev->lock, flags);
|
|
|
+
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
@@ -2440,7 +2746,7 @@ int cdns3_gadget_init(struct cdns3 *cdns)
|
|
|
rdrv->resume = cdns3_gadget_resume;
|
|
|
rdrv->state = CDNS3_ROLE_STATE_INACTIVE;
|
|
|
rdrv->name = "gadget";
|
|
|
- cdns->roles[CDNS3_ROLE_GADGET] = rdrv;
|
|
|
+ cdns->roles[USB_ROLE_DEVICE] = rdrv;
|
|
|
|
|
|
return 0;
|
|
|
}
|