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arm64: dts: ti: k3-j721e-mcu Declare 8 bit TX capability for OSPI

Now that OSPI support 8D-8D-8D (8 bit DDR cmd-addr-data), declare 8 bit
TX capability in DT. While at that drop unused properties.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Vignesh Raghavendra 6 年之前
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1e01f5e0cf
共有 2 个文件被更改,包括 2 次插入3 次删除
  1. 0 1
      arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi
  2. 2 2
      arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi

+ 0 - 1
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi

@@ -403,7 +403,6 @@
 			cdns,fifo-depth = <256>;
 			cdns,fifo-depth = <256>;
 			cdns,fifo-width = <4>;
 			cdns,fifo-width = <4>;
 			cdns,trigger-address = <0x0>;
 			cdns,trigger-address = <0x0>;
-			cdns,delay-elem-ps = <80>;
 			clocks = <&k3_clks 103 0>;
 			clocks = <&k3_clks 103 0>;
 			assigned-clocks = <&k3_clks 103 0>;
 			assigned-clocks = <&k3_clks 103 0>;
 			assigned-clock-parents = <&k3_clks 103 2>;
 			assigned-clock-parents = <&k3_clks 103 2>;

+ 2 - 2
arch/arm64/boot/dts/ti/k3-j721e-som-p0.dtsi

@@ -230,7 +230,7 @@
 	flash@0{
 	flash@0{
 		compatible = "jedec,spi-nor";
 		compatible = "jedec,spi-nor";
 		reg = <0x0>;
 		reg = <0x0>;
-		spi-tx-bus-width = <1>;
+		spi-tx-bus-width = <8>;
 		spi-rx-bus-width = <8>;
 		spi-rx-bus-width = <8>;
 		spi-max-frequency = <50000000>;
 		spi-max-frequency = <50000000>;
 		spi-dqs;
 		spi-dqs;
@@ -238,7 +238,7 @@
 		cdns,tsd2d-ns = <60>;
 		cdns,tsd2d-ns = <60>;
 		cdns,tchsh-ns = <60>;
 		cdns,tchsh-ns = <60>;
 		cdns,tslch-ns = <60>;
 		cdns,tslch-ns = <60>;
-		cdns,read-delay = <2>;
+		cdns,read-delay = <0>;
 		cdns,phy-mode;
 		cdns,phy-mode;
 		#address-cells = <1>;
 		#address-cells = <1>;
 		#size-cells = <1>;
 		#size-cells = <1>;