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@@ -21,6 +21,40 @@
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reg = <0x0 0x80000000 0x0 0x80000000>;
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};
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+ reserved-memory {
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+ #address-cells = <2>;
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+ #size-cells = <2>;
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+ ranges;
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+
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+ ipu2_cma_pool: ipu2_cma@95800000 {
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+ compatible = "shared-dma-pool";
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+ reg = <0x0 0x95800000 0x0 0x3800000>;
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+ reusable;
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+ status = "okay";
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+ };
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+
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+ dsp1_cma_pool: dsp1_cma@99000000 {
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+ compatible = "shared-dma-pool";
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+ reg = <0x0 0x99000000 0x0 0x4000000>;
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+ reusable;
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+ status = "okay";
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+ };
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+
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+ ipu1_cma_pool: ipu1_cma@9d000000 {
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+ compatible = "shared-dma-pool";
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+ reg = <0x0 0x9d000000 0x0 0x2000000>;
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+ reusable;
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+ status = "okay";
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+ };
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+
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+ dsp2_cma_pool: dsp2_cma@9f000000 {
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+ compatible = "shared-dma-pool";
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+ reg = <0x0 0x9f000000 0x0 0x800000>;
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+ reusable;
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+ status = "okay";
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+ };
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+ };
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+
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vsys_12v0: fixedregulator-vsys12v0 {
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/* main supply */
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compatible = "regulator-fixed";
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@@ -450,3 +484,23 @@
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max-bitrate = <5000000>;
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};
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};
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+
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+&ipu2 {
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+ status = "okay";
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+ memory-region = <&ipu2_cma_pool>;
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+};
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+
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+&ipu1 {
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+ status = "okay";
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+ memory-region = <&ipu1_cma_pool>;
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+};
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+
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+&dsp1 {
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+ status = "okay";
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+ memory-region = <&dsp1_cma_pool>;
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+};
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+
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+&dsp2 {
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+ status = "okay";
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+ memory-region = <&dsp2_cma_pool>;
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+};
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