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@@ -185,5 +185,13 @@
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reg = <0xfc400000 0x4000>;
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};
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+ serial@f995e000 {
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+ compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
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+ reg = <0xf995e000 0x1000>;
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+ interrupts = <0 114 0x0>;
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+ clocks = <&gcc GCC_BLSP2_UART2_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
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+ clock-names = "core", "iface";
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+ status = "disabled";
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+ };
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};
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};
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