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@@ -195,8 +195,12 @@ static irqreturn_t wil6210_irq_rx(int irq, void *cookie)
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if (isr & BIT_DMA_EP_RX_ICR_RX_DONE) {
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wil_dbg_irq(wil, "RX done\n");
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isr &= ~BIT_DMA_EP_RX_ICR_RX_DONE;
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- wil_dbg_txrx(wil, "NAPI schedule\n");
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- napi_schedule(&wil->napi_rx);
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+ if (test_bit(wil_status_reset_done, &wil->status)) {
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+ wil_dbg_txrx(wil, "NAPI(Rx) schedule\n");
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+ napi_schedule(&wil->napi_rx);
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+ } else {
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+ wil_err(wil, "Got Rx interrupt while in reset\n");
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+ }
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}
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if (isr)
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@@ -226,10 +230,15 @@ static irqreturn_t wil6210_irq_tx(int irq, void *cookie)
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if (isr & BIT_DMA_EP_TX_ICR_TX_DONE) {
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wil_dbg_irq(wil, "TX done\n");
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- napi_schedule(&wil->napi_tx);
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isr &= ~BIT_DMA_EP_TX_ICR_TX_DONE;
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/* clear also all VRING interrupts */
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isr &= ~(BIT(25) - 1UL);
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+ if (test_bit(wil_status_reset_done, &wil->status)) {
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+ wil_dbg_txrx(wil, "NAPI(Tx) schedule\n");
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+ napi_schedule(&wil->napi_tx);
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+ } else {
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+ wil_err(wil, "Got Tx interrupt while in reset\n");
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+ }
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}
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if (isr)
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