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@@ -115,6 +115,7 @@
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#define MAX_ADC_V2_CHANNELS 10
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#define MAX_ADC_V1_CHANNELS 8
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#define MAX_EXYNOS3250_ADC_CHANNELS 2
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+#define MAX_EXYNOS4212_ADC_CHANNELS 4
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#define MAX_S5PV210_ADC_CHANNELS 10
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/* Bit definitions common for ADC_V1 and ADC_V2 */
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@@ -271,6 +272,19 @@ static void exynos_adc_v1_start_conv(struct exynos_adc *info,
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writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
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}
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+/* Exynos4212 and 4412 is like ADCv1 but with four channels only */
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+static const struct exynos_adc_data exynos4212_adc_data = {
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+ .num_channels = MAX_EXYNOS4212_ADC_CHANNELS,
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+ .mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
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+ .needs_adc_phy = true,
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+ .phy_offset = EXYNOS_ADCV1_PHY_OFFSET,
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+
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+ .init_hw = exynos_adc_v1_init_hw,
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+ .exit_hw = exynos_adc_v1_exit_hw,
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+ .clear_irq = exynos_adc_v1_clear_irq,
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+ .start_conv = exynos_adc_v1_start_conv,
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+};
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+
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static const struct exynos_adc_data exynos_adc_v1_data = {
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.num_channels = MAX_ADC_V1_CHANNELS,
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.mask = ADC_DATX_MASK, /* 12 bit ADC resolution */
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@@ -492,6 +506,9 @@ static const struct of_device_id exynos_adc_match[] = {
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}, {
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.compatible = "samsung,s5pv210-adc",
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.data = &exynos_adc_s5pv210_data,
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+ }, {
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+ .compatible = "samsung,exynos4212-adc",
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+ .data = &exynos4212_adc_data,
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}, {
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.compatible = "samsung,exynos-adc-v1",
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.data = &exynos_adc_v1_data,
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