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Merged TI feature connectivity into ti-linux-4.19.y

TI-Feature: connectivity
TI-Branch: connectivity-ti-linux-4.19.y

* 'connectivity-ti-linux-4.19.y' of ssh://bitbucket.itg.ti.com/lcpdpublicdom/connectivity:
  net: phy: dp83867: enable robust auto-mdix
  HACK: Revert "net: ethernet: ti: am65-cpsw-nuss: clean up am65_cpsw_nuss_ndo_slave_stop()"
  arm64: dts: ti: k3-j721e-mcu-wakeup: Increase HBMC bus clock to 125MHz
  mmc: sdhci_am654: Remove Inverted Write Protect flag
  arm64: dts: ti: k3-j721-common-proc-board: Fix write protect handling
  arm64: dts: ti: k3-am654-base-board: Fix MMC Write Protect handling
  arm64: dts: k3-j721e-proc-board-tps65917: change cpsw2g interface mode to rgmii-rxid
  arm64: dts: k3-j721e-common-proc-board: change cpsw2g interface mode to rgmii-rxid
  arm64: dts: ti: k3-j721e-proc-board-tps65917: disable main_uart2 for eth switch fw

Signed-off-by: LCPD Auto Merger <lcpd_integration@list.ti.com>
LCPD Auto Merger 6 years ago
parent
commit
0cabba2b47

+ 2 - 0
arch/arm64/boot/dts/ti/k3-am654-base-board.dts

@@ -418,12 +418,14 @@
 	bus-width = <8>;
 	non-removable;
 	ti,driver-strength-ohm = <50>;
+	disable-wp;
 };
 
 &sdhci1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_mmc1_pins_default>;
 	ti,driver-strength-ohm = <50>;
+	disable-wp;
 };
 
 &gpu {

+ 3 - 2
arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts

@@ -568,13 +568,12 @@
 	phy0: ethernet-phy@0 {
 		reg = <0>;
 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
-		ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 	};
 };
 
 &cpsw_port1 {
-	phy-mode = "rgmii-id";
+	phy-mode = "rgmii-rxid";
 	phy-handle = <&phy0>;
 };
 
@@ -687,6 +686,7 @@
 	/* eMMC */
 	non-removable;
 	ti,driver-strength-ohm = <50>;
+	disable-wp;
 };
 
 &main_sdhci1 {
@@ -695,6 +695,7 @@
 	vqmmc-supply = <&vdd_sd_dv_alt>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_mmc1_pins_default>;
+	disable-wp;
 };
 
 &main_sdhci2 {

+ 1 - 1
arch/arm64/boot/dts/ti/k3-j721e-mcu-wakeup.dtsi

@@ -425,7 +425,7 @@
 			power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
 			clocks = <&k3_clks 102 0>;
 			assigned-clocks = <&k3_clks 102 0>;
-			assigned-clock-rates = <166666666>;
+			assigned-clock-rates = <250000000>;
 			#address-cells = <2>;
 			#size-cells = <1>;
 			mux-controls = <&hbmc_mux 0>;

+ 8 - 2
arch/arm64/boot/dts/ti/k3-j721e-proc-board-tps65917.dts

@@ -603,13 +603,12 @@
 	phy0: ethernet-phy@0 {
 		reg = <0>;
 		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
-		ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
 		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
 	};
 };
 
 &cpsw_port1 {
-	phy-mode = "rgmii-id";
+	phy-mode = "rgmii-rxid";
 	phy-handle = <&phy0>;
 };
 
@@ -722,6 +721,7 @@
 	/* eMMC */
 	non-removable;
 	ti,driver-strength-ohm = <50>;
+	disable-wp;
 };
 
 &main_sdhci1 {
@@ -730,6 +730,7 @@
 	vqmmc-supply = <&ldo1_reg>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&main_mmc1_pins_default>;
+	disable-wp;
 };
 
 &main_sdhci2 {
@@ -826,3 +827,8 @@
 	phys = <&serdes2_pcie_link>;
 	phy-names = "pcie_phy";
 };
+
+/* uart2 assigned to cpsw9g eth-switch fw running on remote CPU core */
+&main_uart2 {
+	status = "disabled";
+};

+ 3 - 6
drivers/mmc/host/sdhci_am654.c

@@ -298,8 +298,7 @@ struct sdhci_ops sdhci_am654_ops = {
 
 static const struct sdhci_pltfm_data sdhci_am654_pdata = {
 	.ops = &sdhci_am654_ops,
-	.quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
-		  SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
+	.quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 };
 
@@ -335,8 +334,7 @@ struct sdhci_ops sdhci_j721e_8bit_ops = {
 
 static const struct sdhci_pltfm_data sdhci_j721e_8bit_pdata = {
 	.ops = &sdhci_j721e_8bit_ops,
-	.quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
-		  SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
+	.quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 };
 
@@ -359,8 +357,7 @@ struct sdhci_ops sdhci_j721e_4bit_ops = {
 
 static const struct sdhci_pltfm_data sdhci_j721e_4bit_pdata = {
 	.ops = &sdhci_j721e_4bit_ops,
-	.quirks = SDHCI_QUIRK_INVERTED_WRITE_PROTECT |
-		  SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
+	.quirks = SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12,
 	.quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 };
 

+ 2 - 0
drivers/net/ethernet/ti/am65-cpsw-nuss.c

@@ -187,6 +187,7 @@ void am65_cpsw_nuss_adjust_link(struct net_device *ndev)
 				     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 
 		netif_tx_wake_all_queues(ndev);
+		netif_carrier_on(ndev);
 	} else {
 		int tmo;
 		/* disable forwarding */
@@ -202,6 +203,7 @@ void am65_cpsw_nuss_adjust_link(struct net_device *ndev)
 
 		cpsw_sl_ctl_reset(port->slave.mac_sl);
 
+		netif_carrier_off(ndev);
 		netif_tx_stop_all_queues(ndev);
 	}
 

+ 5 - 4
drivers/net/phy/dp83867.c

@@ -297,12 +297,13 @@ static int dp83867_config_init(struct phy_device *phydev)
 		}
 	}
 
+	val = phy_read(phydev, DP83867_CFG3);
+
 	/* Enable Interrupt output INT_OE in CFG3 register */
-	if (phy_interrupt_is_valid(phydev)) {
-		val = phy_read(phydev, DP83867_CFG3);
+	if (phy_interrupt_is_valid(phydev))
 		val |= BIT(7);
-		phy_write(phydev, DP83867_CFG3, val);
-	}
+	val |= BIT(9);
+	phy_write(phydev, DP83867_CFG3, val);
 
 	if (dp83867->port_mirroring != DP83867_PORT_MIRROING_KEEP)
 		dp83867_config_port_mirroring(phydev);