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@@ -302,6 +302,7 @@
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clocks = <&tegra_car TEGRA30_CLK_APBDMA>;
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clocks = <&tegra_car TEGRA30_CLK_APBDMA>;
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resets = <&tegra_car 34>;
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resets = <&tegra_car 34>;
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reset-names = "dma";
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reset-names = "dma";
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+ #dma-cells = <1>;
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};
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};
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ahb: ahb {
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ahb: ahb {
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@@ -349,6 +350,8 @@
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clocks = <&tegra_car TEGRA30_CLK_UARTA>;
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clocks = <&tegra_car TEGRA30_CLK_UARTA>;
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resets = <&tegra_car 6>;
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resets = <&tegra_car 6>;
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reset-names = "serial";
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reset-names = "serial";
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+ dmas = <&apbdma 8>, <&apbdma 8>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -361,6 +364,8 @@
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clocks = <&tegra_car TEGRA30_CLK_UARTB>;
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clocks = <&tegra_car TEGRA30_CLK_UARTB>;
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resets = <&tegra_car 7>;
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resets = <&tegra_car 7>;
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reset-names = "serial";
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reset-names = "serial";
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+ dmas = <&apbdma 9>, <&apbdma 9>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -373,6 +378,8 @@
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clocks = <&tegra_car TEGRA30_CLK_UARTC>;
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clocks = <&tegra_car TEGRA30_CLK_UARTC>;
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resets = <&tegra_car 55>;
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resets = <&tegra_car 55>;
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reset-names = "serial";
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reset-names = "serial";
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+ dmas = <&apbdma 10>, <&apbdma 10>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -385,6 +392,8 @@
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clocks = <&tegra_car TEGRA30_CLK_UARTD>;
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clocks = <&tegra_car TEGRA30_CLK_UARTD>;
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resets = <&tegra_car 65>;
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resets = <&tegra_car 65>;
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reset-names = "serial";
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reset-names = "serial";
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+ dmas = <&apbdma 19>, <&apbdma 19>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -397,6 +406,8 @@
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clocks = <&tegra_car TEGRA30_CLK_UARTE>;
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clocks = <&tegra_car TEGRA30_CLK_UARTE>;
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resets = <&tegra_car 66>;
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resets = <&tegra_car 66>;
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reset-names = "serial";
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reset-names = "serial";
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+ dmas = <&apbdma 20>, <&apbdma 20>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -428,6 +439,8 @@
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clock-names = "div-clk", "fast-clk";
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clock-names = "div-clk", "fast-clk";
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resets = <&tegra_car 12>;
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resets = <&tegra_car 12>;
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reset-names = "i2c";
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reset-names = "i2c";
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+ dmas = <&apbdma 21>, <&apbdma 21>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -442,6 +455,8 @@
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clock-names = "div-clk", "fast-clk";
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clock-names = "div-clk", "fast-clk";
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resets = <&tegra_car 54>;
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resets = <&tegra_car 54>;
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reset-names = "i2c";
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reset-names = "i2c";
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+ dmas = <&apbdma 22>, <&apbdma 22>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -456,6 +471,8 @@
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clock-names = "div-clk", "fast-clk";
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clock-names = "div-clk", "fast-clk";
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resets = <&tegra_car 67>;
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resets = <&tegra_car 67>;
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reset-names = "i2c";
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reset-names = "i2c";
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+ dmas = <&apbdma 23>, <&apbdma 23>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -470,6 +487,8 @@
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resets = <&tegra_car 103>;
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resets = <&tegra_car 103>;
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reset-names = "i2c";
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reset-names = "i2c";
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clock-names = "div-clk", "fast-clk";
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clock-names = "div-clk", "fast-clk";
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+ dmas = <&apbdma 26>, <&apbdma 26>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -484,6 +503,8 @@
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clock-names = "div-clk", "fast-clk";
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clock-names = "div-clk", "fast-clk";
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resets = <&tegra_car 47>;
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resets = <&tegra_car 47>;
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reset-names = "i2c";
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reset-names = "i2c";
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+ dmas = <&apbdma 24>, <&apbdma 24>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -497,6 +518,8 @@
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clocks = <&tegra_car TEGRA30_CLK_SBC1>;
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clocks = <&tegra_car TEGRA30_CLK_SBC1>;
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resets = <&tegra_car 41>;
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resets = <&tegra_car 41>;
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reset-names = "spi";
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reset-names = "spi";
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+ dmas = <&apbdma 15>, <&apbdma 15>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -510,6 +533,8 @@
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clocks = <&tegra_car TEGRA30_CLK_SBC2>;
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clocks = <&tegra_car TEGRA30_CLK_SBC2>;
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resets = <&tegra_car 44>;
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resets = <&tegra_car 44>;
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reset-names = "spi";
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reset-names = "spi";
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+ dmas = <&apbdma 16>, <&apbdma 16>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -523,6 +548,8 @@
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clocks = <&tegra_car TEGRA30_CLK_SBC3>;
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clocks = <&tegra_car TEGRA30_CLK_SBC3>;
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resets = <&tegra_car 46>;
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resets = <&tegra_car 46>;
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reset-names = "spi";
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reset-names = "spi";
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+ dmas = <&apbdma 17>, <&apbdma 17>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -536,6 +563,8 @@
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clocks = <&tegra_car TEGRA30_CLK_SBC4>;
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clocks = <&tegra_car TEGRA30_CLK_SBC4>;
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resets = <&tegra_car 68>;
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resets = <&tegra_car 68>;
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reset-names = "spi";
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reset-names = "spi";
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+ dmas = <&apbdma 18>, <&apbdma 18>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -549,6 +578,8 @@
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clocks = <&tegra_car TEGRA30_CLK_SBC5>;
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clocks = <&tegra_car TEGRA30_CLK_SBC5>;
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resets = <&tegra_car 104>;
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resets = <&tegra_car 104>;
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reset-names = "spi";
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reset-names = "spi";
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+ dmas = <&apbdma 27>, <&apbdma 27>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -562,6 +593,8 @@
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clocks = <&tegra_car TEGRA30_CLK_SBC6>;
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clocks = <&tegra_car TEGRA30_CLK_SBC6>;
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resets = <&tegra_car 106>;
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resets = <&tegra_car 106>;
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reset-names = "spi";
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reset-names = "spi";
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+ dmas = <&apbdma 28>, <&apbdma 28>;
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+ dma-names = "rx", "tx";
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status = "disabled";
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status = "disabled";
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};
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};
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@@ -635,6 +668,12 @@
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reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
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reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
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"i2s3", "i2s4", "dam0", "dam1", "dam2",
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"i2s3", "i2s4", "dam0", "dam1", "dam2",
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"spdif";
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"spdif";
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+ dmas = <&apbdma 1>, <&apbdma 1>,
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+ <&apbdma 2>, <&apbdma 2>,
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+ <&apbdma 3>, <&apbdma 3>,
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+ <&apbdma 4>, <&apbdma 4>;
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+ dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
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+ "rx3", "tx3";
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ranges;
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ranges;
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#address-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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#size-cells = <1>;
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