Config.in.arm 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403
  1. # arm cpu features
  2. config BR2_ARM_CPU_HAS_NEON
  3. bool
  4. # for some cores, NEON support is optional
  5. config BR2_ARM_CPU_MAYBE_HAS_NEON
  6. bool
  7. # for some cores, VFPv2 is optional
  8. config BR2_ARM_CPU_MAYBE_HAS_VFPV2
  9. bool
  10. config BR2_ARM_CPU_HAS_VFPV2
  11. bool
  12. # for some cores, VFPv3 is optional
  13. config BR2_ARM_CPU_MAYBE_HAS_VFPV3
  14. bool
  15. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  16. config BR2_ARM_CPU_HAS_VFPV3
  17. bool
  18. select BR2_ARM_CPU_HAS_VFPV2
  19. # for some cores, VFPv4 is optional
  20. config BR2_ARM_CPU_MAYBE_HAS_VFPV4
  21. bool
  22. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  23. config BR2_ARM_CPU_HAS_VFPV4
  24. bool
  25. select BR2_ARM_CPU_HAS_VFPV3
  26. config BR2_ARM_CPU_HAS_THUMB
  27. bool
  28. config BR2_ARM_CPU_HAS_THUMB2
  29. bool
  30. config BR2_ARM_CPU_ARMV4
  31. bool
  32. config BR2_ARM_CPU_ARMV5
  33. bool
  34. config BR2_ARM_CPU_ARMV6
  35. bool
  36. config BR2_ARM_CPU_ARMV7A
  37. bool
  38. choice
  39. prompt "Target Architecture Variant"
  40. depends on BR2_arm || BR2_armeb
  41. default BR2_arm926t
  42. help
  43. Specific CPU variant to use
  44. config BR2_arm920t
  45. bool "arm920t"
  46. select BR2_ARM_CPU_HAS_THUMB
  47. select BR2_ARM_CPU_ARMV4
  48. config BR2_arm922t
  49. bool "arm922t"
  50. select BR2_ARM_CPU_HAS_THUMB
  51. select BR2_ARM_CPU_ARMV4
  52. config BR2_arm926t
  53. bool "arm926t"
  54. select BR2_ARM_CPU_MAYBE_HAS_VFPV2
  55. select BR2_ARM_CPU_HAS_THUMB
  56. select BR2_ARM_CPU_ARMV5
  57. config BR2_arm1136jf_s
  58. bool "arm1136jf-s"
  59. select BR2_ARM_CPU_HAS_VFPV2
  60. select BR2_ARM_CPU_HAS_THUMB
  61. select BR2_ARM_CPU_ARMV6
  62. config BR2_arm1176jz_s
  63. bool "arm1176jz-s"
  64. select BR2_ARM_CPU_HAS_THUMB
  65. select BR2_ARM_CPU_ARMV6
  66. config BR2_arm1176jzf_s
  67. bool "arm1176jzf-s"
  68. select BR2_ARM_CPU_HAS_VFPV2
  69. select BR2_ARM_CPU_HAS_THUMB
  70. select BR2_ARM_CPU_ARMV6
  71. config BR2_cortex_a5
  72. bool "cortex-A5"
  73. select BR2_ARM_CPU_MAYBE_HAS_NEON
  74. select BR2_ARM_CPU_MAYBE_HAS_VFPV4
  75. select BR2_ARM_CPU_HAS_THUMB2
  76. select BR2_ARM_CPU_ARMV7A
  77. config BR2_cortex_a7
  78. bool "cortex-A7"
  79. select BR2_ARM_CPU_HAS_NEON
  80. select BR2_ARM_CPU_HAS_VFPV4
  81. select BR2_ARM_CPU_HAS_THUMB2
  82. select BR2_ARM_CPU_ARMV7A
  83. config BR2_cortex_a8
  84. bool "cortex-A8"
  85. select BR2_ARM_CPU_HAS_NEON
  86. select BR2_ARM_CPU_HAS_VFPV3
  87. select BR2_ARM_CPU_HAS_THUMB2
  88. select BR2_ARM_CPU_ARMV7A
  89. config BR2_cortex_a9
  90. bool "cortex-A9"
  91. select BR2_ARM_CPU_MAYBE_HAS_NEON
  92. select BR2_ARM_CPU_MAYBE_HAS_VFPV3
  93. select BR2_ARM_CPU_HAS_THUMB2
  94. select BR2_ARM_CPU_ARMV7A
  95. config BR2_cortex_a12
  96. bool "cortex-A12"
  97. select BR2_ARM_CPU_HAS_NEON
  98. select BR2_ARM_CPU_HAS_VFPV4
  99. select BR2_ARM_CPU_HAS_THUMB2
  100. select BR2_ARM_CPU_ARMV7A
  101. config BR2_cortex_a15
  102. bool "cortex-A15"
  103. select BR2_ARM_CPU_HAS_NEON
  104. select BR2_ARM_CPU_HAS_VFPV4
  105. select BR2_ARM_CPU_HAS_THUMB2
  106. select BR2_ARM_CPU_ARMV7A
  107. config BR2_fa526
  108. bool "fa526/626"
  109. select BR2_ARM_CPU_ARMV4
  110. config BR2_pj4
  111. bool "pj4"
  112. select BR2_ARM_CPU_HAS_VFPV3
  113. select BR2_ARM_CPU_ARMV7A
  114. config BR2_strongarm
  115. bool "strongarm sa110/sa1100"
  116. select BR2_ARM_CPU_ARMV4
  117. config BR2_xscale
  118. bool "xscale"
  119. select BR2_ARM_CPU_HAS_THUMB
  120. select BR2_ARM_CPU_ARMV5
  121. config BR2_iwmmxt
  122. bool "iwmmxt"
  123. select BR2_ARM_CPU_ARMV5
  124. endchoice
  125. choice
  126. prompt "Target ABI"
  127. depends on BR2_arm || BR2_armeb
  128. default BR2_ARM_EABI
  129. help
  130. Application Binary Interface to use. The Application Binary
  131. Interface describes the calling conventions (how arguments
  132. are passed to functions, how the return value is passed, how
  133. system calls are made, etc.).
  134. config BR2_ARM_EABI
  135. bool "EABI"
  136. help
  137. The EABI is currently the standard ARM ABI, which is used in
  138. most projects. It supports both the 'soft' floating point
  139. model (in which floating point instructions are emulated in
  140. software) and the 'softfp' floating point model (in which
  141. floating point instructions are executed using an hardware
  142. floating point unit, but floating point arguments to
  143. functions are passed in integer registers).
  144. The 'softfp' floating point model is link-compatible with
  145. the 'soft' floating point model, i.e you can link a library
  146. built 'soft' with some other code built 'softfp'.
  147. However, passing the floating point arguments in integer
  148. registers is a bit inefficient, so if your ARM processor has
  149. a floating point unit, and you don't have pre-compiled
  150. 'soft' or 'softfp' code, using the EABIhf ABI will provide
  151. better floating point performances.
  152. If your processor does not have a floating point unit, then
  153. you must use this ABI.
  154. config BR2_ARM_EABIHF
  155. bool "EABIhf"
  156. depends on BR2_ARM_CPU_MAYBE_HAS_VFPV2 || BR2_ARM_CPU_HAS_VFPV2
  157. help
  158. The EABIhf is an extension of EABI which supports the 'hard'
  159. floating point model. This model uses the floating point
  160. unit to execute floating point instructions, and passes
  161. floating point arguments in floating point registers.
  162. It is more efficient than EABI for floating point related
  163. workload. However, it does not allow to link against code
  164. that has been pre-built for the 'soft' or 'softfp' floating
  165. point models.
  166. If your processor has a floating point unit, and you don't
  167. depend on existing pre-compiled code, this option is most
  168. likely the best choice.
  169. endchoice
  170. config BR2_ARM_ENABLE_NEON
  171. bool "Enable NEON SIMD extension support"
  172. depends on BR2_ARM_CPU_MAYBE_HAS_NEON
  173. select BR2_ARM_CPU_HAS_NEON
  174. help
  175. For some CPU cores, the NEON SIMD extension is optional.
  176. Select this option if you are certain your particular
  177. implementation has NEON support and you want to use it.
  178. choice
  179. prompt "Floating point strategy"
  180. depends on BR2_ARM_EABI || BR2_ARM_EABIHF
  181. default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4
  182. default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3
  183. default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2
  184. default BR2_ARM_SOFT_FLOAT if !BR2_ARM_CPU_HAS_VFPV2
  185. config BR2_ARM_SOFT_FLOAT
  186. bool "Soft float"
  187. depends on BR2_ARM_EABI
  188. select BR2_SOFT_FLOAT
  189. help
  190. This option allows to use software emulated floating
  191. point. It should be used for ARM cores that do not include a
  192. Vector Floating Point unit, such as ARMv5 cores (ARM926 for
  193. example) or certain ARMv6 cores.
  194. config BR2_ARM_FPU_VFPV2
  195. bool "VFPv2"
  196. depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_MAYBE_HAS_VFPV2
  197. help
  198. This option allows to use the VFPv2 floating point unit, as
  199. available in some ARMv5 processors (ARM926EJ-S) and some
  200. ARMv6 processors (ARM1136JF-S, ARM1176JZF-S and ARM11
  201. MPCore).
  202. Note that this option is also safe to use for newer cores
  203. such as Cortex-A, because the VFPv3 and VFPv4 units are
  204. backward compatible with VFPv2.
  205. config BR2_ARM_FPU_VFPV3
  206. bool "VFPv3"
  207. depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
  208. help
  209. This option allows to use the VFPv3 floating point unit, as
  210. available in some ARMv7 processors (Cortex-A{8, 9}). This
  211. option requires a VFPv3 unit that has 32 double-precision
  212. registers, which is not necessarily the case in all SOCs
  213. based on Cortex-A{8, 9}. If you're unsure, use VFPv3-D16
  214. instead, which is guaranteed to work on all Cortex-A{8, 9}.
  215. Note that this option is also safe to use for newer cores
  216. that have a VFPv4 unit, because VFPv4 is backward compatible
  217. with VFPv3. They must of course also have 32
  218. double-precision registers.
  219. config BR2_ARM_FPU_VFPV3D16
  220. bool "VFPv3-D16"
  221. depends on BR2_ARM_CPU_HAS_VFPV3 || BR2_ARM_CPU_MAYBE_HAS_VFPV3
  222. help
  223. This option allows to use the VFPv3 floating point unit, as
  224. available in some ARMv7 processors (Cortex-A{8, 9}). This
  225. option requires a VFPv3 unit that has 16 double-precision
  226. registers, which is generally the case in all SOCs based on
  227. Cortex-A{8, 9}, even though VFPv3 is technically optional on
  228. Cortex-A9. This is the safest option for those cores.
  229. Note that this option is also safe to use for newer cores
  230. such that have a VFPv4 unit, because the VFPv4 is backward
  231. compatible with VFPv3.
  232. config BR2_ARM_FPU_VFPV4
  233. bool "VFPv4"
  234. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  235. help
  236. This option allows to use the VFPv4 floating point unit, as
  237. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  238. 15}). This option requires a VFPv4 unit that has 32
  239. double-precision registers, which is not necessarily the
  240. case in all SOCs based on Cortex-A{5, 7, 12, 15}. If you're
  241. unsure, you should probably use VFPv4-D16 instead.
  242. Note that if you want binary code that works on all ARMv7
  243. cores, including the earlier Cortex-A{8, 9}, you should
  244. instead select VFPv3.
  245. config BR2_ARM_FPU_VFPV4D16
  246. bool "VFPv4-D16"
  247. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  248. help
  249. This option allows to use the VFPv4 floating point unit, as
  250. available in some ARMv7 processors (Cortex-A{5, 7, 12,
  251. 15}). This option requires a VFPv4 unit that has 16
  252. double-precision registers, which is always available on
  253. Cortex-A12 and Cortex-A15, but optional on Cortex-A5 and
  254. Cortex-A7.
  255. Note that if you want binary code that works on all ARMv7
  256. cores, including the earlier Cortex-A{8, 9}, you should
  257. instead select VFPv3-D16.
  258. config BR2_ARM_FPU_NEON
  259. bool "NEON"
  260. depends on BR2_ARM_CPU_HAS_NEON
  261. help
  262. This option allows to use the NEON SIMD unit, as available
  263. in some ARMv7 processors, as a floating-point unit. It
  264. should however be noted that using NEON for floating point
  265. operations doesn't provide a complete compatibility with the
  266. IEEE 754.
  267. config BR2_ARM_FPU_NEON_VFPV4
  268. bool "NEON/VFPv4"
  269. depends on BR2_ARM_CPU_HAS_VFPV4 || BR2_ARM_CPU_MAYBE_HAS_VFPV4
  270. depends on BR2_ARM_CPU_HAS_NEON
  271. help
  272. This option allows to use both the VFPv4 and the NEON SIMD
  273. units for floating point operations. Note that some ARMv7
  274. cores do not necessarily have VFPv4 and/or NEON support, for
  275. example on Cortex-A5 and Cortex-A7, support for VFPv4 and
  276. NEON is optional.
  277. endchoice
  278. choice
  279. prompt "ARM instruction set"
  280. depends on BR2_ARM_CPU_HAS_THUMB || BR2_ARM_CPU_HAS_THUMB2
  281. config BR2_ARM_INSTRUCTIONS_ARM_CHOICE
  282. bool "ARM"
  283. help
  284. This option instructs the compiler to generate regular ARM
  285. instructions, that are all 32 bits wide.
  286. config BR2_ARM_INSTRUCTIONS_THUMB
  287. bool "Thumb"
  288. depends on BR2_ARM_CPU_HAS_THUMB
  289. help
  290. This option instructions the compiler to generate Thumb
  291. instructions, which allows to mix 16 bits instructions and
  292. 32 bits instructions. This generally provides a much smaller
  293. compiled binary size.
  294. config BR2_ARM_INSTRUCTIONS_THUMB2
  295. bool "Thumb2"
  296. depends on BR2_ARM_CPU_HAS_THUMB2
  297. help
  298. This option instructions the compiler to generate Thumb2
  299. instructions, which allows to mix 16 bits instructions and
  300. 32 bits instructions. This generally provides a much smaller
  301. compiled binary size.
  302. endchoice
  303. config BR2_ARM_INSTRUCTIONS_ARM
  304. def_bool y
  305. depends on !(BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2)
  306. config BR2_ARCH
  307. default "arm" if BR2_arm
  308. default "armeb" if BR2_armeb
  309. config BR2_ENDIAN
  310. default "LITTLE" if BR2_arm
  311. default "BIG" if BR2_armeb
  312. config BR2_ARCH_HAS_ATOMICS
  313. default y
  314. config BR2_GCC_TARGET_CPU
  315. default "arm920t" if BR2_arm920t
  316. default "arm922t" if BR2_arm922t
  317. default "arm926ej-s" if BR2_arm926t
  318. default "arm1136j-s" if BR2_arm1136j_s
  319. default "arm1136jf-s" if BR2_arm1136jf_s
  320. default "arm1176jz-s" if BR2_arm1176jz_s
  321. default "arm1176jzf-s" if BR2_arm1176jzf_s
  322. default "cortex-a5" if BR2_cortex_a5
  323. default "cortex-a7" if BR2_cortex_a7
  324. default "cortex-a8" if BR2_cortex_a8
  325. default "cortex-a9" if BR2_cortex_a9
  326. default "cortex-a12" if BR2_cortex_a12
  327. default "cortex-a15" if BR2_cortex_a15
  328. default "fa526" if BR2_fa526
  329. default "marvell-pj4" if BR2_pj4
  330. default "strongarm" if BR2_strongarm
  331. default "xscale" if BR2_xscale
  332. default "iwmmxt" if BR2_iwmmxt
  333. config BR2_GCC_TARGET_ABI
  334. default "aapcs-linux"
  335. config BR2_GCC_TARGET_FPU
  336. default "vfp" if BR2_ARM_FPU_VFPV2
  337. default "vfpv3" if BR2_ARM_FPU_VFPV3
  338. default "vfpv3-d16" if BR2_ARM_FPU_VFPV3D16
  339. default "vfpv4" if BR2_ARM_FPU_VFPV4
  340. default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16
  341. default "neon" if BR2_ARM_FPU_NEON
  342. default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4
  343. config BR2_GCC_TARGET_FLOAT_ABI
  344. default "soft" if BR2_ARM_SOFT_FLOAT
  345. default "softfp" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABI
  346. default "hard" if !BR2_ARM_SOFT_FLOAT && BR2_ARM_EABIHF
  347. config BR2_GCC_TARGET_MODE
  348. default "arm" if BR2_ARM_INSTRUCTIONS_ARM
  349. default "thumb" if BR2_ARM_INSTRUCTIONS_THUMB || BR2_ARM_INSTRUCTIONS_THUMB2