Config.in 11 KB

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  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. config BR2_USE_MMU
  9. bool
  10. choice
  11. prompt "Target Architecture"
  12. default BR2_i386
  13. help
  14. Select the target architecture family to build for.
  15. config BR2_arcle
  16. bool "ARC (little endian)"
  17. select BR2_USE_MMU
  18. help
  19. Synopsys' DesignWare ARC Processor Cores are a family of
  20. 32-bit CPUs that can be used from deeply embedded to high
  21. performance host applications. Little endian.
  22. config BR2_arceb
  23. bool "ARC (big endian)"
  24. select BR2_USE_MMU
  25. help
  26. Synopsys' DesignWare ARC Processor Cores are a family of
  27. 32-bit CPUs that can be used from deeply embedded to high
  28. performance host applications. Big endian.
  29. config BR2_arm
  30. bool "ARM (little endian)"
  31. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  32. help
  33. ARM is a 32-bit reduced instruction set computer (RISC)
  34. instruction set architecture (ISA) developed by ARM Holdings.
  35. Little endian.
  36. http://www.arm.com/
  37. http://en.wikipedia.org/wiki/ARM
  38. config BR2_armeb
  39. bool "ARM (big endian)"
  40. select BR2_USE_MMU
  41. help
  42. ARM is a 32-bit reduced instruction set computer (RISC)
  43. instruction set architecture (ISA) developed by ARM Holdings.
  44. Big endian.
  45. http://www.arm.com/
  46. http://en.wikipedia.org/wiki/ARM
  47. config BR2_aarch64
  48. bool "AArch64 (little endian)"
  49. select BR2_ARCH_IS_64
  50. help
  51. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  52. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  53. http://en.wikipedia.org/wiki/ARM
  54. config BR2_aarch64_be
  55. bool "AArch64 (big endian)"
  56. select BR2_ARCH_IS_64
  57. help
  58. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  59. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  60. http://en.wikipedia.org/wiki/ARM
  61. config BR2_csky
  62. bool "csky"
  63. select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  64. select BR2_USE_MMU
  65. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  66. help
  67. csky is processor IP from china.
  68. http://www.c-sky.com/
  69. http://www.github.com/c-sky
  70. config BR2_i386
  71. bool "i386"
  72. select BR2_USE_MMU
  73. help
  74. Intel i386 architecture compatible microprocessor
  75. http://en.wikipedia.org/wiki/I386
  76. config BR2_m68k
  77. bool "m68k"
  78. # MMU support is set by the subarchitecture file, arch/Config.in.m68k
  79. help
  80. Motorola 68000 family microprocessor
  81. http://en.wikipedia.org/wiki/M68k
  82. config BR2_microblazeel
  83. bool "Microblaze AXI (little endian)"
  84. select BR2_USE_MMU
  85. help
  86. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
  87. bus based architecture (little endian)
  88. http://www.xilinx.com
  89. http://en.wikipedia.org/wiki/Microblaze
  90. config BR2_microblazebe
  91. bool "Microblaze non-AXI (big endian)"
  92. select BR2_USE_MMU
  93. help
  94. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
  95. bus based architecture (non-AXI, big endian)
  96. http://www.xilinx.com
  97. http://en.wikipedia.org/wiki/Microblaze
  98. config BR2_mips
  99. bool "MIPS (big endian)"
  100. select BR2_USE_MMU
  101. help
  102. MIPS is a RISC microprocessor from MIPS Technologies. Big
  103. endian.
  104. http://www.mips.com/
  105. http://en.wikipedia.org/wiki/MIPS_Technologies
  106. config BR2_mipsel
  107. bool "MIPS (little endian)"
  108. select BR2_USE_MMU
  109. help
  110. MIPS is a RISC microprocessor from MIPS Technologies. Little
  111. endian.
  112. http://www.mips.com/
  113. http://en.wikipedia.org/wiki/MIPS_Technologies
  114. config BR2_mips64
  115. bool "MIPS64 (big endian)"
  116. select BR2_ARCH_IS_64
  117. select BR2_USE_MMU
  118. help
  119. MIPS is a RISC microprocessor from MIPS Technologies. Big
  120. endian.
  121. http://www.mips.com/
  122. http://en.wikipedia.org/wiki/MIPS_Technologies
  123. config BR2_mips64el
  124. bool "MIPS64 (little endian)"
  125. select BR2_ARCH_IS_64
  126. select BR2_USE_MMU
  127. help
  128. MIPS is a RISC microprocessor from MIPS Technologies. Little
  129. endian.
  130. http://www.mips.com/
  131. http://en.wikipedia.org/wiki/MIPS_Technologies
  132. config BR2_nios2
  133. bool "Nios II"
  134. select BR2_USE_MMU
  135. help
  136. Nios II is a soft core processor from Altera Corporation.
  137. http://www.altera.com/
  138. http://en.wikipedia.org/wiki/Nios_II
  139. config BR2_or1k
  140. bool "OpenRISC"
  141. select BR2_USE_MMU
  142. help
  143. OpenRISC is a free and open processor for embedded system.
  144. http://openrisc.io
  145. config BR2_powerpc
  146. bool "PowerPC"
  147. select BR2_USE_MMU
  148. help
  149. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  150. alliance. Big endian.
  151. http://www.power.org/
  152. http://en.wikipedia.org/wiki/Powerpc
  153. config BR2_powerpc64
  154. bool "PowerPC64 (big endian)"
  155. select BR2_ARCH_IS_64
  156. select BR2_USE_MMU
  157. help
  158. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  159. alliance. Big endian.
  160. http://www.power.org/
  161. http://en.wikipedia.org/wiki/Powerpc
  162. config BR2_powerpc64le
  163. bool "PowerPC64 (little endian)"
  164. select BR2_ARCH_IS_64
  165. select BR2_USE_MMU
  166. help
  167. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  168. alliance. Little endian.
  169. http://www.power.org/
  170. http://en.wikipedia.org/wiki/Powerpc
  171. config BR2_riscv
  172. bool "RISCV"
  173. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  174. help
  175. RISC-V is an open, free Instruction Set Architecture created
  176. by the UC Berkeley Architecture Research group and supported
  177. and promoted by RISC-V Foundation.
  178. https://riscv.org/
  179. https://en.wikipedia.org/wiki/RISC-V
  180. config BR2_s390x
  181. bool "s390x"
  182. select BR2_ARCH_IS_64
  183. select BR2_USE_MMU
  184. help
  185. s390x is a big-endian architecture made by IBM.
  186. http://www.ibm.com/
  187. http://en.wikipedia.org/wiki/IBM_System/390
  188. config BR2_sh
  189. bool "SuperH"
  190. select BR2_USE_MMU
  191. help
  192. SuperH (or SH) is a 32-bit reduced instruction set computer
  193. (RISC) instruction set architecture (ISA) developed by
  194. Hitachi.
  195. http://www.hitachi.com/
  196. http://en.wikipedia.org/wiki/SuperH
  197. config BR2_sparc
  198. bool "SPARC"
  199. select BR2_USE_MMU
  200. help
  201. SPARC (from Scalable Processor Architecture) is a RISC
  202. instruction set architecture (ISA) developed by Sun
  203. Microsystems.
  204. http://www.oracle.com/sun
  205. http://en.wikipedia.org/wiki/Sparc
  206. config BR2_sparc64
  207. bool "SPARC64"
  208. select BR2_ARCH_IS_64
  209. select BR2_USE_MMU
  210. help
  211. SPARC (from Scalable Processor Architecture) is a RISC
  212. instruction set architecture (ISA) developed by Sun
  213. Microsystems.
  214. http://www.oracle.com/sun
  215. http://en.wikipedia.org/wiki/Sparc
  216. config BR2_x86_64
  217. bool "x86_64"
  218. select BR2_ARCH_IS_64
  219. select BR2_USE_MMU
  220. help
  221. x86-64 is an extension of the x86 instruction set (Intel i386
  222. architecture compatible microprocessor).
  223. http://en.wikipedia.org/wiki/X86_64
  224. config BR2_xtensa
  225. bool "Xtensa"
  226. # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
  227. help
  228. Xtensa is a Tensilica processor IP architecture.
  229. http://en.wikipedia.org/wiki/Xtensa
  230. http://www.tensilica.com/
  231. endchoice
  232. # For some architectures or specific cores, our internal toolchain
  233. # backend is not suitable (like, missing support in upstream gcc, or
  234. # no ChipCo fork exists...)
  235. config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  236. bool
  237. config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
  238. bool
  239. default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  240. # The following symbols are selected by the individual
  241. # Config.in.$ARCH files
  242. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  243. bool
  244. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  245. bool
  246. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  247. config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  248. bool
  249. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  250. config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  251. bool
  252. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  253. config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  254. bool
  255. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  256. config BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  257. bool
  258. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  259. config BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  260. bool
  261. select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  262. config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
  263. bool
  264. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  265. config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
  266. bool
  267. select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
  268. config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
  269. bool
  270. select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
  271. # The following string values are defined by the individual
  272. # Config.in.$ARCH files
  273. config BR2_ARCH
  274. string
  275. config BR2_NORMALIZED_ARCH
  276. string
  277. config BR2_ENDIAN
  278. string
  279. config BR2_GCC_TARGET_ARCH
  280. string
  281. config BR2_GCC_TARGET_ABI
  282. string
  283. config BR2_GCC_TARGET_NAN
  284. string
  285. config BR2_GCC_TARGET_FP32_MODE
  286. string
  287. config BR2_GCC_TARGET_CPU
  288. string
  289. # The value of this option will be passed as --with-fpu=<value> when
  290. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  291. # wrapper (external toolchain)
  292. config BR2_GCC_TARGET_FPU
  293. string
  294. # The value of this option will be passed as --with-float=<value> when
  295. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  296. # wrapper (external toolchain)
  297. config BR2_GCC_TARGET_FLOAT_ABI
  298. string
  299. # The value of this option will be passed as --with-mode=<value> when
  300. # building gcc (internal backend) or -m<value> in the toolchain
  301. # wrapper (external toolchain)
  302. config BR2_GCC_TARGET_MODE
  303. string
  304. # Must be selected by binary formats that support shared libraries.
  305. config BR2_BINFMT_SUPPORTS_SHARED
  306. bool
  307. # Must match the name of the architecture from readelf point of view,
  308. # i.e the "Machine:" field of readelf output. See get_machine_name()
  309. # in binutils/readelf.c for the list of possible values.
  310. config BR2_READELF_ARCH_NAME
  311. string
  312. if BR2_arcle || BR2_arceb
  313. source "arch/Config.in.arc"
  314. endif
  315. if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
  316. source "arch/Config.in.arm"
  317. endif
  318. if BR2_csky
  319. source "arch/Config.in.csky"
  320. endif
  321. if BR2_m68k
  322. source "arch/Config.in.m68k"
  323. endif
  324. if BR2_microblazeel || BR2_microblazebe
  325. source "arch/Config.in.microblaze"
  326. endif
  327. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  328. source "arch/Config.in.mips"
  329. endif
  330. if BR2_nios2
  331. source "arch/Config.in.nios2"
  332. endif
  333. if BR2_or1k
  334. source "arch/Config.in.or1k"
  335. endif
  336. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  337. source "arch/Config.in.powerpc"
  338. endif
  339. if BR2_riscv
  340. source "arch/Config.in.riscv"
  341. endif
  342. if BR2_s390x
  343. source "arch/Config.in.s390x"
  344. endif
  345. if BR2_sh
  346. source "arch/Config.in.sh"
  347. endif
  348. if BR2_sparc || BR2_sparc64
  349. source "arch/Config.in.sparc"
  350. endif
  351. if BR2_i386 || BR2_x86_64
  352. source "arch/Config.in.x86"
  353. endif
  354. if BR2_xtensa
  355. source "arch/Config.in.xtensa"
  356. endif
  357. # Set up target binary format
  358. choice
  359. prompt "Target Binary Format"
  360. default BR2_BINFMT_ELF if BR2_USE_MMU
  361. default BR2_BINFMT_FLAT
  362. config BR2_BINFMT_ELF
  363. bool "ELF"
  364. depends on BR2_USE_MMU
  365. select BR2_BINFMT_SUPPORTS_SHARED
  366. help
  367. ELF (Executable and Linkable Format) is a format for libraries
  368. and executables used across different architectures and
  369. operating systems.
  370. config BR2_BINFMT_FLAT
  371. bool "FLAT"
  372. depends on !BR2_USE_MMU
  373. help
  374. FLAT binary is a relatively simple and lightweight executable
  375. format based on the original a.out format. It is widely used
  376. in environment where no MMU is available.
  377. endchoice
  378. # Set up flat binary type
  379. choice
  380. prompt "FLAT Binary type"
  381. default BR2_BINFMT_FLAT_ONE
  382. depends on BR2_BINFMT_FLAT
  383. config BR2_BINFMT_FLAT_ONE
  384. bool "One memory region"
  385. help
  386. All segments are linked into one memory region.
  387. config BR2_BINFMT_FLAT_SHARED
  388. bool "Shared binary"
  389. depends on BR2_m68k
  390. # Even though this really generates shared binaries, there is no libdl
  391. # and dlopen() cannot be used. So packages that require shared
  392. # libraries cannot be built. Therefore, we don't select
  393. # BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
  394. # Although this adds -static to the compilation, that's not a problem
  395. # because the -mid-shared-library option overrides it.
  396. help
  397. Allow to load and link indiviual FLAT binaries at run time.
  398. endchoice
  399. endmenu # Target options