Config.in 10 KB

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  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. config BR2_USE_MMU
  9. bool
  10. choice
  11. prompt "Target Architecture"
  12. default BR2_i386
  13. help
  14. Select the target architecture family to build for.
  15. config BR2_arcle
  16. bool "ARC (little endian)"
  17. select BR2_USE_MMU
  18. help
  19. Synopsys' DesignWare ARC Processor Cores are a family of
  20. 32-bit CPUs that can be used from deeply embedded to high
  21. performance host applications. Little endian.
  22. config BR2_arceb
  23. bool "ARC (big endian)"
  24. select BR2_USE_MMU
  25. help
  26. Synopsys' DesignWare ARC Processor Cores are a family of
  27. 32-bit CPUs that can be used from deeply embedded to high
  28. performance host applications. Big endian.
  29. config BR2_arm
  30. bool "ARM (little endian)"
  31. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  32. help
  33. ARM is a 32-bit reduced instruction set computer (RISC)
  34. instruction set architecture (ISA) developed by ARM Holdings.
  35. Little endian.
  36. http://www.arm.com/
  37. http://en.wikipedia.org/wiki/ARM
  38. config BR2_armeb
  39. bool "ARM (big endian)"
  40. select BR2_USE_MMU
  41. help
  42. ARM is a 32-bit reduced instruction set computer (RISC)
  43. instruction set architecture (ISA) developed by ARM Holdings.
  44. Big endian.
  45. http://www.arm.com/
  46. http://en.wikipedia.org/wiki/ARM
  47. config BR2_aarch64
  48. bool "AArch64 (little endian)"
  49. select BR2_ARCH_IS_64
  50. help
  51. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  52. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  53. http://en.wikipedia.org/wiki/ARM
  54. config BR2_aarch64_be
  55. bool "AArch64 (big endian)"
  56. select BR2_ARCH_IS_64
  57. help
  58. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  59. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  60. http://en.wikipedia.org/wiki/ARM
  61. config BR2_i386
  62. bool "i386"
  63. select BR2_USE_MMU
  64. help
  65. Intel i386 architecture compatible microprocessor
  66. http://en.wikipedia.org/wiki/I386
  67. config BR2_m68k
  68. bool "m68k"
  69. # MMU support is set by the subarchitecture file, arch/Config.in.m68k
  70. help
  71. Motorola 68000 family microprocessor
  72. http://en.wikipedia.org/wiki/M68k
  73. config BR2_microblazeel
  74. bool "Microblaze AXI (little endian)"
  75. select BR2_USE_MMU
  76. help
  77. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI
  78. bus based architecture (little endian)
  79. http://www.xilinx.com
  80. http://en.wikipedia.org/wiki/Microblaze
  81. config BR2_microblazebe
  82. bool "Microblaze non-AXI (big endian)"
  83. select BR2_USE_MMU
  84. help
  85. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB
  86. bus based architecture (non-AXI, big endian)
  87. http://www.xilinx.com
  88. http://en.wikipedia.org/wiki/Microblaze
  89. config BR2_mips
  90. bool "MIPS (big endian)"
  91. select BR2_USE_MMU
  92. help
  93. MIPS is a RISC microprocessor from MIPS Technologies. Big
  94. endian.
  95. http://www.mips.com/
  96. http://en.wikipedia.org/wiki/MIPS_Technologies
  97. config BR2_mipsel
  98. bool "MIPS (little endian)"
  99. select BR2_USE_MMU
  100. help
  101. MIPS is a RISC microprocessor from MIPS Technologies. Little
  102. endian.
  103. http://www.mips.com/
  104. http://en.wikipedia.org/wiki/MIPS_Technologies
  105. config BR2_mips64
  106. bool "MIPS64 (big endian)"
  107. select BR2_ARCH_IS_64
  108. select BR2_USE_MMU
  109. help
  110. MIPS is a RISC microprocessor from MIPS Technologies. Big
  111. endian.
  112. http://www.mips.com/
  113. http://en.wikipedia.org/wiki/MIPS_Technologies
  114. config BR2_mips64el
  115. bool "MIPS64 (little endian)"
  116. select BR2_ARCH_IS_64
  117. select BR2_USE_MMU
  118. help
  119. MIPS is a RISC microprocessor from MIPS Technologies. Little
  120. endian.
  121. http://www.mips.com/
  122. http://en.wikipedia.org/wiki/MIPS_Technologies
  123. config BR2_nios2
  124. bool "Nios II"
  125. select BR2_USE_MMU
  126. help
  127. Nios II is a soft core processor from Altera Corporation.
  128. http://www.altera.com/
  129. http://en.wikipedia.org/wiki/Nios_II
  130. config BR2_or1k
  131. bool "OpenRISC"
  132. select BR2_USE_MMU
  133. help
  134. OpenRISC is a free and open processor for embedded system.
  135. http://openrisc.io
  136. config BR2_powerpc
  137. bool "PowerPC"
  138. select BR2_USE_MMU
  139. help
  140. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  141. alliance. Big endian.
  142. http://www.power.org/
  143. http://en.wikipedia.org/wiki/Powerpc
  144. config BR2_powerpc64
  145. bool "PowerPC64 (big endian)"
  146. select BR2_ARCH_IS_64
  147. select BR2_USE_MMU
  148. help
  149. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  150. alliance. Big endian.
  151. http://www.power.org/
  152. http://en.wikipedia.org/wiki/Powerpc
  153. config BR2_powerpc64le
  154. bool "PowerPC64 (little endian)"
  155. select BR2_ARCH_IS_64
  156. select BR2_USE_MMU
  157. help
  158. PowerPC is a RISC architecture created by Apple-IBM-Motorola
  159. alliance. Little endian.
  160. http://www.power.org/
  161. http://en.wikipedia.org/wiki/Powerpc
  162. config BR2_riscv
  163. bool "RISCV"
  164. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  165. help
  166. RISC-V is an open, free Instruction Set Architecture created
  167. by the UC Berkeley Architecture Research group and supported
  168. and promoted by RISC-V Foundation.
  169. https://riscv.org/
  170. https://en.wikipedia.org/wiki/RISC-V
  171. config BR2_s390x
  172. bool "s390x"
  173. select BR2_ARCH_IS_64
  174. select BR2_USE_MMU
  175. help
  176. s390x is a big-endian architecture made by IBM.
  177. http://www.ibm.com/
  178. http://en.wikipedia.org/wiki/IBM_System/390
  179. config BR2_sh
  180. bool "SuperH"
  181. select BR2_USE_MMU
  182. help
  183. SuperH (or SH) is a 32-bit reduced instruction set computer
  184. (RISC) instruction set architecture (ISA) developed by
  185. Hitachi.
  186. http://www.hitachi.com/
  187. http://en.wikipedia.org/wiki/SuperH
  188. config BR2_sparc
  189. bool "SPARC"
  190. select BR2_USE_MMU
  191. help
  192. SPARC (from Scalable Processor Architecture) is a RISC
  193. instruction set architecture (ISA) developed by Sun
  194. Microsystems.
  195. http://www.oracle.com/sun
  196. http://en.wikipedia.org/wiki/Sparc
  197. config BR2_sparc64
  198. bool "SPARC64"
  199. select BR2_ARCH_IS_64
  200. select BR2_USE_MMU
  201. help
  202. SPARC (from Scalable Processor Architecture) is a RISC
  203. instruction set architecture (ISA) developed by Sun
  204. Microsystems.
  205. http://www.oracle.com/sun
  206. http://en.wikipedia.org/wiki/Sparc
  207. config BR2_x86_64
  208. bool "x86_64"
  209. select BR2_ARCH_IS_64
  210. select BR2_USE_MMU
  211. help
  212. x86-64 is an extension of the x86 instruction set (Intel i386
  213. architecture compatible microprocessor).
  214. http://en.wikipedia.org/wiki/X86_64
  215. config BR2_xtensa
  216. bool "Xtensa"
  217. # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
  218. help
  219. Xtensa is a Tensilica processor IP architecture.
  220. http://en.wikipedia.org/wiki/Xtensa
  221. http://www.tensilica.com/
  222. endchoice
  223. # For some architectures or specific cores, our internal toolchain
  224. # backend is not suitable (like, missing support in upstream gcc, or
  225. # no ChipCo fork exists...)
  226. config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  227. bool
  228. config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
  229. bool
  230. default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  231. # The following symbols are selected by the individual
  232. # Config.in.$ARCH files
  233. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  234. bool
  235. config BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  236. bool
  237. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_8
  238. config BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  239. bool
  240. select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
  241. config BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  242. bool
  243. select BR2_ARCH_NEEDS_GCC_AT_LEAST_5
  244. config BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  245. bool
  246. select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
  247. config BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  248. bool
  249. select BR2_ARCH_NEEDS_GCC_AT_LEAST_7
  250. config BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  251. bool
  252. select BR2_ARCH_NEEDS_GCC_AT_LEAST_8
  253. config BR2_ARCH_NEEDS_GCC_AT_LEAST_10
  254. bool
  255. select BR2_ARCH_NEEDS_GCC_AT_LEAST_9
  256. config BR2_ARCH_NEEDS_GCC_AT_LEAST_11
  257. bool
  258. select BR2_ARCH_NEEDS_GCC_AT_LEAST_10
  259. config BR2_ARCH_NEEDS_GCC_AT_LEAST_12
  260. bool
  261. select BR2_ARCH_NEEDS_GCC_AT_LEAST_11
  262. config BR2_ARCH_NEEDS_GCC_AT_LEAST_13
  263. bool
  264. select BR2_ARCH_NEEDS_GCC_AT_LEAST_12
  265. config BR2_ARCH_NEEDS_GCC_AT_LEAST_14
  266. bool
  267. select BR2_ARCH_NEEDS_GCC_AT_LEAST_13
  268. # The following string values are defined by the individual
  269. # Config.in.$ARCH files
  270. config BR2_ARCH
  271. string
  272. config BR2_NORMALIZED_ARCH
  273. string
  274. config BR2_ENDIAN
  275. string
  276. config BR2_GCC_TARGET_ARCH
  277. string
  278. config BR2_GCC_TARGET_ABI
  279. string
  280. config BR2_GCC_TARGET_NAN
  281. string
  282. config BR2_GCC_TARGET_FP32_MODE
  283. string
  284. config BR2_GCC_TARGET_CPU
  285. string
  286. # The value of this option will be passed as --with-fpu=<value> when
  287. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  288. # wrapper (external toolchain)
  289. config BR2_GCC_TARGET_FPU
  290. string
  291. # The value of this option will be passed as --with-float=<value> when
  292. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  293. # wrapper (external toolchain)
  294. config BR2_GCC_TARGET_FLOAT_ABI
  295. string
  296. # The value of this option will be passed as --with-mode=<value> when
  297. # building gcc (internal backend) or -m<value> in the toolchain
  298. # wrapper (external toolchain)
  299. config BR2_GCC_TARGET_MODE
  300. string
  301. # Must be selected by binary formats that support shared libraries.
  302. config BR2_BINFMT_SUPPORTS_SHARED
  303. bool
  304. # Must match the name of the architecture from readelf point of view,
  305. # i.e the "Machine:" field of readelf output. See get_machine_name()
  306. # in binutils/readelf.c for the list of possible values.
  307. config BR2_READELF_ARCH_NAME
  308. string
  309. if BR2_arcle || BR2_arceb
  310. source "arch/Config.in.arc"
  311. endif
  312. if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
  313. source "arch/Config.in.arm"
  314. endif
  315. if BR2_m68k
  316. source "arch/Config.in.m68k"
  317. endif
  318. if BR2_microblazeel || BR2_microblazebe
  319. source "arch/Config.in.microblaze"
  320. endif
  321. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  322. source "arch/Config.in.mips"
  323. endif
  324. if BR2_nios2
  325. source "arch/Config.in.nios2"
  326. endif
  327. if BR2_or1k
  328. source "arch/Config.in.or1k"
  329. endif
  330. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  331. source "arch/Config.in.powerpc"
  332. endif
  333. if BR2_riscv
  334. source "arch/Config.in.riscv"
  335. endif
  336. if BR2_s390x
  337. source "arch/Config.in.s390x"
  338. endif
  339. if BR2_sh
  340. source "arch/Config.in.sh"
  341. endif
  342. if BR2_sparc || BR2_sparc64
  343. source "arch/Config.in.sparc"
  344. endif
  345. if BR2_i386 || BR2_x86_64
  346. source "arch/Config.in.x86"
  347. endif
  348. if BR2_xtensa
  349. source "arch/Config.in.xtensa"
  350. endif
  351. # Set up target binary format
  352. choice
  353. prompt "Target Binary Format"
  354. default BR2_BINFMT_ELF if BR2_USE_MMU
  355. default BR2_BINFMT_FLAT
  356. config BR2_BINFMT_ELF
  357. bool "ELF"
  358. depends on BR2_USE_MMU
  359. select BR2_BINFMT_SUPPORTS_SHARED
  360. help
  361. ELF (Executable and Linkable Format) is a format for libraries
  362. and executables used across different architectures and
  363. operating systems.
  364. config BR2_BINFMT_FLAT
  365. bool "FLAT"
  366. depends on !BR2_USE_MMU
  367. help
  368. FLAT binary is a relatively simple and lightweight executable
  369. format based on the original a.out format. It is widely used
  370. in environment where no MMU is available.
  371. endchoice
  372. endmenu # Target options