Config.in 12 KB

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  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. config BR2_ARCH_HAS_MMU_MANDATORY
  9. bool
  10. config BR2_ARCH_HAS_MMU_OPTIONAL
  11. bool
  12. config BR2_ARCH_HAS_FDPIC_SUPPORT
  13. bool
  14. choice
  15. prompt "Target Architecture"
  16. default BR2_i386
  17. help
  18. Select the target architecture family to build for.
  19. config BR2_arcle
  20. bool "ARC (little endian)"
  21. select BR2_ARCH_HAS_MMU_MANDATORY
  22. help
  23. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  24. that can be used from deeply embedded to high performance host
  25. applications. Little endian.
  26. config BR2_arceb
  27. bool "ARC (big endian)"
  28. select BR2_ARCH_HAS_MMU_MANDATORY
  29. help
  30. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  31. that can be used from deeply embedded to high performance host
  32. applications. Big endian.
  33. config BR2_arm
  34. bool "ARM (little endian)"
  35. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  36. help
  37. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  38. set architecture (ISA) developed by ARM Holdings. Little endian.
  39. http://www.arm.com/
  40. http://en.wikipedia.org/wiki/ARM
  41. config BR2_armeb
  42. bool "ARM (big endian)"
  43. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  44. help
  45. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  46. set architecture (ISA) developed by ARM Holdings. Big endian.
  47. http://www.arm.com/
  48. http://en.wikipedia.org/wiki/ARM
  49. config BR2_aarch64
  50. bool "AArch64 (little endian)"
  51. select BR2_ARCH_IS_64
  52. select BR2_ARCH_HAS_MMU_MANDATORY
  53. help
  54. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  55. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  56. http://en.wikipedia.org/wiki/ARM
  57. config BR2_aarch64_be
  58. bool "AArch64 (big endian)"
  59. select BR2_ARCH_IS_64
  60. select BR2_ARCH_HAS_MMU_MANDATORY
  61. help
  62. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  63. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  64. http://en.wikipedia.org/wiki/ARM
  65. config BR2_bfin
  66. bool "Blackfin"
  67. select BR2_ARCH_HAS_FDPIC_SUPPORT
  68. help
  69. The Blackfin is a family of 16 or 32-bit microprocessors developed,
  70. manufactured and marketed by Analog Devices.
  71. http://www.analog.com/
  72. http://en.wikipedia.org/wiki/Blackfin
  73. config BR2_csky
  74. bool "csky"
  75. select BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  76. select BR2_ARCH_HAS_MMU_MANDATORY
  77. help
  78. csky is processor IP from china.
  79. http://www.c-sky.com/
  80. http://www.github.com/c-sky
  81. config BR2_i386
  82. bool "i386"
  83. select BR2_ARCH_HAS_MMU_MANDATORY
  84. help
  85. Intel i386 architecture compatible microprocessor
  86. http://en.wikipedia.org/wiki/I386
  87. config BR2_m68k
  88. bool "m68k"
  89. # MMU support is set by the subarchitecture file, arch/Config.in.m68k
  90. help
  91. Motorola 68000 family microprocessor
  92. http://en.wikipedia.org/wiki/M68k
  93. config BR2_microblazeel
  94. bool "Microblaze AXI (little endian)"
  95. select BR2_ARCH_HAS_MMU_MANDATORY
  96. help
  97. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
  98. based architecture (little endian)
  99. http://www.xilinx.com
  100. http://en.wikipedia.org/wiki/Microblaze
  101. config BR2_microblazebe
  102. bool "Microblaze non-AXI (big endian)"
  103. select BR2_ARCH_HAS_MMU_MANDATORY
  104. help
  105. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
  106. based architecture (non-AXI, big endian)
  107. http://www.xilinx.com
  108. http://en.wikipedia.org/wiki/Microblaze
  109. config BR2_mips
  110. bool "MIPS (big endian)"
  111. select BR2_ARCH_HAS_MMU_MANDATORY
  112. help
  113. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  114. http://www.mips.com/
  115. http://en.wikipedia.org/wiki/MIPS_Technologies
  116. config BR2_mipsel
  117. bool "MIPS (little endian)"
  118. select BR2_ARCH_HAS_MMU_MANDATORY
  119. help
  120. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  121. http://www.mips.com/
  122. http://en.wikipedia.org/wiki/MIPS_Technologies
  123. config BR2_mips64
  124. bool "MIPS64 (big endian)"
  125. select BR2_ARCH_IS_64
  126. select BR2_ARCH_HAS_MMU_MANDATORY
  127. help
  128. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  129. http://www.mips.com/
  130. http://en.wikipedia.org/wiki/MIPS_Technologies
  131. config BR2_mips64el
  132. bool "MIPS64 (little endian)"
  133. select BR2_ARCH_IS_64
  134. select BR2_ARCH_HAS_MMU_MANDATORY
  135. help
  136. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  137. http://www.mips.com/
  138. http://en.wikipedia.org/wiki/MIPS_Technologies
  139. config BR2_nios2
  140. bool "Nios II"
  141. select BR2_ARCH_HAS_MMU_MANDATORY
  142. help
  143. Nios II is a soft core processor from Altera Corporation.
  144. http://www.altera.com/
  145. http://en.wikipedia.org/wiki/Nios_II
  146. config BR2_or1k
  147. bool "OpenRISC"
  148. select BR2_ARCH_HAS_MMU_MANDATORY
  149. help
  150. OpenRISC is a free and open processor for embedded system.
  151. http://openrisc.io
  152. config BR2_powerpc
  153. bool "PowerPC"
  154. select BR2_ARCH_HAS_MMU_MANDATORY
  155. help
  156. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  157. Big endian.
  158. http://www.power.org/
  159. http://en.wikipedia.org/wiki/Powerpc
  160. config BR2_powerpc64
  161. bool "PowerPC64 (big endian)"
  162. select BR2_ARCH_IS_64
  163. select BR2_ARCH_HAS_MMU_MANDATORY
  164. help
  165. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  166. Big endian.
  167. http://www.power.org/
  168. http://en.wikipedia.org/wiki/Powerpc
  169. config BR2_powerpc64le
  170. bool "PowerPC64 (little endian)"
  171. select BR2_ARCH_IS_64
  172. select BR2_ARCH_HAS_MMU_MANDATORY
  173. help
  174. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  175. Little endian.
  176. http://www.power.org/
  177. http://en.wikipedia.org/wiki/Powerpc
  178. config BR2_sh
  179. bool "SuperH"
  180. select BR2_ARCH_HAS_MMU_OPTIONAL
  181. help
  182. SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
  183. instruction set architecture (ISA) developed by Hitachi.
  184. http://www.hitachi.com/
  185. http://en.wikipedia.org/wiki/SuperH
  186. config BR2_sparc
  187. bool "SPARC"
  188. select BR2_ARCH_HAS_MMU_MANDATORY
  189. help
  190. SPARC (from Scalable Processor Architecture) is a RISC instruction
  191. set architecture (ISA) developed by Sun Microsystems.
  192. http://www.oracle.com/sun
  193. http://en.wikipedia.org/wiki/Sparc
  194. config BR2_sparc64
  195. bool "SPARC64"
  196. select BR2_ARCH_IS_64
  197. select BR2_ARCH_HAS_MMU_MANDATORY
  198. help
  199. SPARC (from Scalable Processor Architecture) is a RISC instruction
  200. set architecture (ISA) developed by Sun Microsystems.
  201. http://www.oracle.com/sun
  202. http://en.wikipedia.org/wiki/Sparc
  203. config BR2_x86_64
  204. bool "x86_64"
  205. select BR2_ARCH_IS_64
  206. select BR2_ARCH_HAS_MMU_MANDATORY
  207. help
  208. x86-64 is an extension of the x86 instruction set (Intel i386
  209. architecture compatible microprocessor).
  210. http://en.wikipedia.org/wiki/X86_64
  211. config BR2_xtensa
  212. bool "Xtensa"
  213. # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
  214. help
  215. Xtensa is a Tensilica processor IP architecture.
  216. http://en.wikipedia.org/wiki/Xtensa
  217. http://www.tensilica.com/
  218. endchoice
  219. # For some architectures or specific cores, our internal toolchain
  220. # backend is not suitable (like, missing support in upstream gcc, or
  221. # no ChipCo fork exists...)
  222. config BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  223. bool
  224. config BR2_ARCH_HAS_TOOLCHAIN_BUILDROOT
  225. bool
  226. default y if !BR2_ARCH_HAS_NO_TOOLCHAIN_BUILDROOT
  227. # The following string values are defined by the individual
  228. # Config.in.$ARCH files
  229. config BR2_ARCH
  230. string
  231. config BR2_ENDIAN
  232. string
  233. config BR2_GCC_TARGET_ARCH
  234. string
  235. config BR2_GCC_TARGET_ABI
  236. string
  237. config BR2_GCC_TARGET_NAN
  238. string
  239. config BR2_GCC_TARGET_FP32_MODE
  240. string
  241. config BR2_GCC_TARGET_CPU
  242. string
  243. config BR2_GCC_TARGET_CPU_REVISION
  244. string
  245. # The value of this option will be passed as --with-fpu=<value> when
  246. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  247. # wrapper (external toolchain)
  248. config BR2_GCC_TARGET_FPU
  249. string
  250. # The value of this option will be passed as --with-float=<value> when
  251. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  252. # wrapper (external toolchain)
  253. config BR2_GCC_TARGET_FLOAT_ABI
  254. string
  255. # The value of this option will be passed as --with-mode=<value> when
  256. # building gcc (internal backend) or -m<value> in the toolchain
  257. # wrapper (external toolchain)
  258. config BR2_GCC_TARGET_MODE
  259. string
  260. # Must be selected by binary formats that support shared libraries.
  261. config BR2_BINFMT_SUPPORTS_SHARED
  262. bool
  263. # Must match the name of the architecture from readelf point of view,
  264. # i.e the "Machine:" field of readelf output. See get_machine_name()
  265. # in binutils/readelf.c for the list of possible values.
  266. config BR2_READELF_ARCH_NAME
  267. string
  268. # Set up target binary format
  269. choice
  270. prompt "Target Binary Format"
  271. default BR2_BINFMT_ELF if BR2_USE_MMU
  272. default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
  273. default BR2_BINFMT_FLAT
  274. config BR2_BINFMT_ELF
  275. bool "ELF"
  276. depends on BR2_USE_MMU
  277. select BR2_BINFMT_SUPPORTS_SHARED
  278. help
  279. ELF (Executable and Linkable Format) is a format for libraries and
  280. executables used across different architectures and operating
  281. systems.
  282. config BR2_BINFMT_FDPIC
  283. bool "FDPIC"
  284. depends on BR2_ARCH_HAS_FDPIC_SUPPORT
  285. select BR2_BINFMT_SUPPORTS_SHARED
  286. help
  287. ELF FDPIC binaries are based on ELF, but allow the individual load
  288. segments of a binary to be located in memory independently of each
  289. other. This makes this format ideal for use in environments where no
  290. MMU is available.
  291. config BR2_BINFMT_FLAT
  292. bool "FLAT"
  293. depends on !BR2_USE_MMU
  294. help
  295. FLAT binary is a relatively simple and lightweight executable format
  296. based on the original a.out format. It is widely used in environment
  297. where no MMU is available.
  298. endchoice
  299. # Set up flat binary type
  300. choice
  301. prompt "FLAT Binary type"
  302. depends on BR2_BINFMT_FLAT
  303. default BR2_BINFMT_FLAT_ONE
  304. config BR2_BINFMT_FLAT_ONE
  305. bool "One memory region"
  306. help
  307. All segments are linked into one memory region.
  308. config BR2_BINFMT_FLAT_SEP_DATA
  309. bool "Separate data and code region"
  310. # this FLAT binary type technically exists on m68k, but fails
  311. # to build numerous packages: due to architecture limitation,
  312. # big functions cannot be built in this mode. They cause build
  313. # failures such as "Tried to convert PC relative branch to
  314. # absolute jump" or "error: value -yyyyy out of range".
  315. depends on BR2_bfin
  316. help
  317. Allow for the data and text segments to be separated and placed in
  318. different regions of memory.
  319. config BR2_BINFMT_FLAT_SHARED
  320. bool "Shared binary"
  321. depends on BR2_m68k || BR2_bfin
  322. # Even though this really generates shared binaries, there is no libdl
  323. # and dlopen() cannot be used. So packages that require shared
  324. # libraries cannot be built. Therefore, we don't select
  325. # BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
  326. # Although this adds -static to the compilation, that's not a problem
  327. # because the -mid-shared-library option overrides it.
  328. help
  329. Allow to load and link indiviual FLAT binaries at run time.
  330. endchoice
  331. if BR2_arcle || BR2_arceb
  332. source "arch/Config.in.arc"
  333. endif
  334. if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
  335. source "arch/Config.in.arm"
  336. endif
  337. if BR2_bfin
  338. source "arch/Config.in.bfin"
  339. endif
  340. if BR2_csky
  341. source "arch/Config.in.csky"
  342. endif
  343. if BR2_m68k
  344. source "arch/Config.in.m68k"
  345. endif
  346. if BR2_microblazeel || BR2_microblazebe
  347. source "arch/Config.in.microblaze"
  348. endif
  349. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  350. source "arch/Config.in.mips"
  351. endif
  352. if BR2_nios2
  353. source "arch/Config.in.nios2"
  354. endif
  355. if BR2_or1k
  356. source "arch/Config.in.or1k"
  357. endif
  358. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  359. source "arch/Config.in.powerpc"
  360. endif
  361. if BR2_sh
  362. source "arch/Config.in.sh"
  363. endif
  364. if BR2_sparc || BR2_sparc64
  365. source "arch/Config.in.sparc"
  366. endif
  367. if BR2_i386 || BR2_x86_64
  368. source "arch/Config.in.x86"
  369. endif
  370. if BR2_xtensa
  371. source "arch/Config.in.xtensa"
  372. endif
  373. endmenu # Target options