Config.in 11 KB

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  1. menu "Target options"
  2. config BR2_ARCH_IS_64
  3. bool
  4. config BR2_KERNEL_64_USERLAND_32
  5. bool
  6. config BR2_SOFT_FLOAT
  7. bool
  8. config BR2_ARCH_HAS_MMU_MANDATORY
  9. bool
  10. config BR2_ARCH_HAS_MMU_OPTIONAL
  11. bool
  12. config BR2_ARCH_HAS_FDPIC_SUPPORT
  13. bool
  14. choice
  15. prompt "Target Architecture"
  16. default BR2_i386
  17. help
  18. Select the target architecture family to build for.
  19. config BR2_arcle
  20. bool "ARC (little endian)"
  21. select BR2_ARCH_HAS_MMU_MANDATORY
  22. help
  23. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  24. that can be used from deeply embedded to high performance host
  25. applications. Little endian.
  26. config BR2_arceb
  27. bool "ARC (big endian)"
  28. select BR2_ARCH_HAS_MMU_MANDATORY
  29. help
  30. Synopsys' DesignWare ARC Processor Cores are a family of 32-bit CPUs
  31. that can be used from deeply embedded to high performance host
  32. applications. Big endian.
  33. config BR2_arm
  34. bool "ARM (little endian)"
  35. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  36. help
  37. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  38. set architecture (ISA) developed by ARM Holdings. Little endian.
  39. http://www.arm.com/
  40. http://en.wikipedia.org/wiki/ARM
  41. config BR2_armeb
  42. bool "ARM (big endian)"
  43. # MMU support is set by the subarchitecture file, arch/Config.in.arm
  44. help
  45. ARM is a 32-bit reduced instruction set computer (RISC) instruction
  46. set architecture (ISA) developed by ARM Holdings. Big endian.
  47. http://www.arm.com/
  48. http://en.wikipedia.org/wiki/ARM
  49. config BR2_aarch64
  50. bool "AArch64 (little endian)"
  51. select BR2_ARCH_IS_64
  52. select BR2_ARCH_HAS_MMU_MANDATORY
  53. help
  54. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  55. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  56. http://en.wikipedia.org/wiki/ARM
  57. config BR2_aarch64_be
  58. bool "AArch64 (big endian)"
  59. select BR2_ARCH_IS_64
  60. select BR2_ARCH_HAS_MMU_MANDATORY
  61. help
  62. Aarch64 is a 64-bit architecture developed by ARM Holdings.
  63. http://www.arm.com/products/processors/instruction-set-architectures/armv8-architecture.php
  64. http://en.wikipedia.org/wiki/ARM
  65. config BR2_bfin
  66. bool "Blackfin"
  67. select BR2_ARCH_HAS_FDPIC_SUPPORT
  68. help
  69. The Blackfin is a family of 16 or 32-bit microprocessors developed,
  70. manufactured and marketed by Analog Devices.
  71. http://www.analog.com/
  72. http://en.wikipedia.org/wiki/Blackfin
  73. config BR2_csky
  74. bool "csky"
  75. select BR2_ARCH_HAS_MMU_MANDATORY
  76. help
  77. csky is processor IP from china.
  78. http://www.c-sky.com/
  79. http://www.github.com/c-sky
  80. config BR2_i386
  81. bool "i386"
  82. select BR2_ARCH_HAS_MMU_MANDATORY
  83. help
  84. Intel i386 architecture compatible microprocessor
  85. http://en.wikipedia.org/wiki/I386
  86. config BR2_m68k
  87. bool "m68k"
  88. # MMU support is set by the subarchitecture file, arch/Config.in.m68k
  89. help
  90. Motorola 68000 family microprocessor
  91. http://en.wikipedia.org/wiki/M68k
  92. config BR2_microblazeel
  93. bool "Microblaze AXI (little endian)"
  94. select BR2_ARCH_HAS_MMU_MANDATORY
  95. help
  96. Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
  97. based architecture (little endian)
  98. http://www.xilinx.com
  99. http://en.wikipedia.org/wiki/Microblaze
  100. config BR2_microblazebe
  101. bool "Microblaze non-AXI (big endian)"
  102. select BR2_ARCH_HAS_MMU_MANDATORY
  103. help
  104. Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
  105. based architecture (non-AXI, big endian)
  106. http://www.xilinx.com
  107. http://en.wikipedia.org/wiki/Microblaze
  108. config BR2_mips
  109. bool "MIPS (big endian)"
  110. select BR2_ARCH_HAS_MMU_MANDATORY
  111. help
  112. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  113. http://www.mips.com/
  114. http://en.wikipedia.org/wiki/MIPS_Technologies
  115. config BR2_mipsel
  116. bool "MIPS (little endian)"
  117. select BR2_ARCH_HAS_MMU_MANDATORY
  118. help
  119. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  120. http://www.mips.com/
  121. http://en.wikipedia.org/wiki/MIPS_Technologies
  122. config BR2_mips64
  123. bool "MIPS64 (big endian)"
  124. select BR2_ARCH_IS_64
  125. select BR2_ARCH_HAS_MMU_MANDATORY
  126. help
  127. MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
  128. http://www.mips.com/
  129. http://en.wikipedia.org/wiki/MIPS_Technologies
  130. config BR2_mips64el
  131. bool "MIPS64 (little endian)"
  132. select BR2_ARCH_IS_64
  133. select BR2_ARCH_HAS_MMU_MANDATORY
  134. help
  135. MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
  136. http://www.mips.com/
  137. http://en.wikipedia.org/wiki/MIPS_Technologies
  138. config BR2_nios2
  139. bool "Nios II"
  140. select BR2_ARCH_HAS_MMU_MANDATORY
  141. help
  142. Nios II is a soft core processor from Altera Corporation.
  143. http://www.altera.com/
  144. http://en.wikipedia.org/wiki/Nios_II
  145. config BR2_or1k
  146. bool "OpenRISC"
  147. select BR2_ARCH_HAS_MMU_MANDATORY
  148. help
  149. OpenRISC is a free and open processor for embedded system.
  150. http://openrisc.io
  151. config BR2_powerpc
  152. bool "PowerPC"
  153. select BR2_ARCH_HAS_MMU_MANDATORY
  154. help
  155. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  156. Big endian.
  157. http://www.power.org/
  158. http://en.wikipedia.org/wiki/Powerpc
  159. config BR2_powerpc64
  160. bool "PowerPC64 (big endian)"
  161. select BR2_ARCH_IS_64
  162. select BR2_ARCH_HAS_MMU_MANDATORY
  163. help
  164. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  165. Big endian.
  166. http://www.power.org/
  167. http://en.wikipedia.org/wiki/Powerpc
  168. config BR2_powerpc64le
  169. bool "PowerPC64 (little endian)"
  170. select BR2_ARCH_IS_64
  171. select BR2_ARCH_HAS_MMU_MANDATORY
  172. help
  173. PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
  174. Little endian.
  175. http://www.power.org/
  176. http://en.wikipedia.org/wiki/Powerpc
  177. config BR2_sh
  178. bool "SuperH"
  179. select BR2_ARCH_HAS_MMU_OPTIONAL
  180. help
  181. SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
  182. instruction set architecture (ISA) developed by Hitachi.
  183. http://www.hitachi.com/
  184. http://en.wikipedia.org/wiki/SuperH
  185. config BR2_sparc
  186. bool "SPARC"
  187. select BR2_ARCH_HAS_MMU_MANDATORY
  188. help
  189. SPARC (from Scalable Processor Architecture) is a RISC instruction
  190. set architecture (ISA) developed by Sun Microsystems.
  191. http://www.oracle.com/sun
  192. http://en.wikipedia.org/wiki/Sparc
  193. config BR2_sparc64
  194. bool "SPARC64"
  195. select BR2_ARCH_IS_64
  196. select BR2_ARCH_HAS_MMU_MANDATORY
  197. help
  198. SPARC (from Scalable Processor Architecture) is a RISC instruction
  199. set architecture (ISA) developed by Sun Microsystems.
  200. http://www.oracle.com/sun
  201. http://en.wikipedia.org/wiki/Sparc
  202. config BR2_x86_64
  203. bool "x86_64"
  204. select BR2_ARCH_IS_64
  205. select BR2_ARCH_HAS_MMU_MANDATORY
  206. help
  207. x86-64 is an extension of the x86 instruction set (Intel i386
  208. architecture compatible microprocessor).
  209. http://en.wikipedia.org/wiki/X86_64
  210. config BR2_xtensa
  211. bool "Xtensa"
  212. # MMU support is set by the subarchitecture file, arch/Config.in.xtensa
  213. help
  214. Xtensa is a Tensilica processor IP architecture.
  215. http://en.wikipedia.org/wiki/Xtensa
  216. http://www.tensilica.com/
  217. endchoice
  218. # The following string values are defined by the individual
  219. # Config.in.$ARCH files
  220. config BR2_ARCH
  221. string
  222. config BR2_ENDIAN
  223. string
  224. config BR2_GCC_TARGET_ARCH
  225. string
  226. config BR2_GCC_TARGET_ABI
  227. string
  228. config BR2_GCC_TARGET_CPU
  229. string
  230. config BR2_GCC_TARGET_CPU_REVISION
  231. string
  232. # The value of this option will be passed as --with-fpu=<value> when
  233. # building gcc (internal backend) or -mfpu=<value> in the toolchain
  234. # wrapper (external toolchain)
  235. config BR2_GCC_TARGET_FPU
  236. string
  237. # The value of this option will be passed as --with-float=<value> when
  238. # building gcc (internal backend) or -mfloat-abi=<value> in the toolchain
  239. # wrapper (external toolchain)
  240. config BR2_GCC_TARGET_FLOAT_ABI
  241. string
  242. # The value of this option will be passed as --with-mode=<value> when
  243. # building gcc (internal backend) or -m<value> in the toolchain
  244. # wrapper (external toolchain)
  245. config BR2_GCC_TARGET_MODE
  246. string
  247. # Must be selected by binary formats that support shared libraries.
  248. config BR2_BINFMT_SUPPORTS_SHARED
  249. bool
  250. # Must match the name of the architecture from readelf point of view,
  251. # i.e the "Machine:" field of readelf output. See get_machine_name()
  252. # in binutils/readelf.c for the list of possible values.
  253. config BR2_READELF_ARCH_NAME
  254. string
  255. # Set up target binary format
  256. choice
  257. prompt "Target Binary Format"
  258. default BR2_BINFMT_ELF if BR2_USE_MMU
  259. default BR2_BINFMT_FDPIC if BR2_ARCH_HAS_FDPIC_SUPPORT
  260. default BR2_BINFMT_FLAT
  261. config BR2_BINFMT_ELF
  262. bool "ELF"
  263. depends on BR2_USE_MMU
  264. select BR2_BINFMT_SUPPORTS_SHARED
  265. help
  266. ELF (Executable and Linkable Format) is a format for libraries and
  267. executables used across different architectures and operating
  268. systems.
  269. config BR2_BINFMT_FDPIC
  270. bool "FDPIC"
  271. depends on BR2_ARCH_HAS_FDPIC_SUPPORT
  272. select BR2_BINFMT_SUPPORTS_SHARED
  273. help
  274. ELF FDPIC binaries are based on ELF, but allow the individual load
  275. segments of a binary to be located in memory independently of each
  276. other. This makes this format ideal for use in environments where no
  277. MMU is available.
  278. config BR2_BINFMT_FLAT
  279. bool "FLAT"
  280. depends on !BR2_USE_MMU
  281. help
  282. FLAT binary is a relatively simple and lightweight executable format
  283. based on the original a.out format. It is widely used in environment
  284. where no MMU is available.
  285. endchoice
  286. # Set up flat binary type
  287. choice
  288. prompt "FLAT Binary type"
  289. depends on BR2_BINFMT_FLAT
  290. default BR2_BINFMT_FLAT_ONE
  291. config BR2_BINFMT_FLAT_ONE
  292. bool "One memory region"
  293. help
  294. All segments are linked into one memory region.
  295. config BR2_BINFMT_FLAT_SEP_DATA
  296. bool "Separate data and code region"
  297. # this FLAT binary type technically exists on m68k, but fails
  298. # to build numerous packages: due to architecture limitation,
  299. # big functions cannot be built in this mode. They cause build
  300. # failures such as "Tried to convert PC relative branch to
  301. # absolute jump" or "error: value -yyyyy out of range".
  302. depends on BR2_bfin
  303. help
  304. Allow for the data and text segments to be separated and placed in
  305. different regions of memory.
  306. config BR2_BINFMT_FLAT_SHARED
  307. bool "Shared binary"
  308. depends on BR2_m68k || BR2_bfin
  309. # Even though this really generates shared binaries, there is no libdl
  310. # and dlopen() cannot be used. So packages that require shared
  311. # libraries cannot be built. Therefore, we don't select
  312. # BR2_BINFMT_SUPPORTS_SHARED and therefore force BR2_STATIC_LIBS.
  313. # Although this adds -static to the compilation, that's not a problem
  314. # because the -mid-shared-library option overrides it.
  315. help
  316. Allow to load and link indiviual FLAT binaries at run time.
  317. endchoice
  318. if BR2_arcle || BR2_arceb
  319. source "arch/Config.in.arc"
  320. endif
  321. if BR2_arm || BR2_armeb || BR2_aarch64 || BR2_aarch64_be
  322. source "arch/Config.in.arm"
  323. endif
  324. if BR2_bfin
  325. source "arch/Config.in.bfin"
  326. endif
  327. if BR2_csky
  328. source "arch/Config.in.csky"
  329. endif
  330. if BR2_m68k
  331. source "arch/Config.in.m68k"
  332. endif
  333. if BR2_microblazeel || BR2_microblazebe
  334. source "arch/Config.in.microblaze"
  335. endif
  336. if BR2_mips || BR2_mips64 || BR2_mipsel || BR2_mips64el
  337. source "arch/Config.in.mips"
  338. endif
  339. if BR2_nios2
  340. source "arch/Config.in.nios2"
  341. endif
  342. if BR2_or1k
  343. source "arch/Config.in.or1k"
  344. endif
  345. if BR2_powerpc || BR2_powerpc64 || BR2_powerpc64le
  346. source "arch/Config.in.powerpc"
  347. endif
  348. if BR2_sh
  349. source "arch/Config.in.sh"
  350. endif
  351. if BR2_sparc || BR2_sparc64
  352. source "arch/Config.in.sparc"
  353. endif
  354. if BR2_i386 || BR2_x86_64
  355. source "arch/Config.in.x86"
  356. endif
  357. if BR2_xtensa
  358. source "arch/Config.in.xtensa"
  359. endif
  360. endmenu # Target options